A Transferability Study of Interpolation-Based Hardware Model Checking for Software Verification.
Dirk BeyerPo-Chun ChienMarek JankolaNian-Ze LeePublished in: Proc. ACM Softw. Eng. (2024)
Keyphrases
- model checking
- temporal logic
- temporal properties
- symbolic model checking
- finite state
- computation tree logic
- epistemic logic
- formal specification
- modal logic
- formal verification
- model checker
- specification language
- verification method
- bounded model checking
- reachability analysis
- automated verification
- knowledge base