Interpolation and SAT-Based Model Checking Revisited: Adoption to Software Verification.
Dirk BeyerNian-Ze LeePhilipp WendlerPublished in: CoRR (2022)
Keyphrases
- model checking
- bounded model checking
- temporal logic
- formal verification
- planning domains
- automated verification
- computation tree logic
- formal specification
- finite state
- reachability analysis
- model checker
- partial order reduction
- symbolic model checking
- timed automata
- linear temporal logic
- epistemic logic
- temporal properties
- concurrent systems
- reactive systems
- verification method
- formal methods
- process algebra
- answer set programming
- transition systems
- pspace complete
- deterministic finite automaton
- asynchronous circuits
- sat solvers
- software architecture