Heinz Riener

ORCID

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 46

Top Venues

University of Bremen, Germany (PHD)

Education History

University of Bremen, Germany

PHD

Publications

Shubham Rai, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli, Akash Kumar
Utilizing XMG-Based Synthesis to Preserve Self-Duality for RFET-Based Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (3) (2023)
Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications. CoRR (2022)
Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
Beyond local optimality of buffer and splitter insertion for AQFP circuits. DAC (2022)
Alessandro Tempia Calvino, Heinz Riener, Shubham Rai, Akash Kumar, Giovanni De Micheli
A Versatile Mapping Approach for Technology Mapping and Graph Optimization. ASP-DAC (2022)
Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli
A Simulation-Guided Paradigm for Logic Synthesis and Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (8) (2022)
Heinz Riener, Siang-Yun Lee, Alan Mishchenko, Giovanni De Micheli
Boolean Rewriting Strikes Back: Reconvergence-Driven Windowing Meets Resynthesis. ASP-DAC (2022)
Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli
Three-Input Gates for Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Shubham Rai, Heinz Riener, Giovanni De Micheli, Akash Kumar
Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies. DATE (2021)
Dewmini Sudara Marakkalage, Heinz Riener, Giovanni De Micheli
Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using an Exact Database. NANOARCH (2021)
Eleonora Testa, Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits. ASP-DAC (2021)
Bruno Schmitt, Fereshte Mozafari, Giulia Meuli, Heinz Riener, Giovanni De Micheli
From Boolean functions to quantum circuits: A scalable quantum compilation flow in C++. DATE (2021)
Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
Irredundant Buffer and Splitter Insertion and Scheduling-Based Optimization for AQFP Circuits. CoRR (2021)
Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
Logic Resynthesis of Majority-Based Circuits by Top-Down Decomposition. DDECS (2021)
Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. IACR Cryptol. ePrint Arch. 2020 (2020)
Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli
Simulation-Guided Boolean Resubstitution. CoRR (2020)
Gianluca Martino, Heinz Riener, Görschwin Fey
Revisiting Explicit Enumeration for Exact Synthesis. DSD (2020)
Victor N. Kravets, Jie-Hong R. Jiang, Heinz Riener
Learning to Automate the Design Updates From Observed Engineering Changes in the Chip Development Cycle. DATE (2020)
Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. DATE (2020)
Roderick Bloem, Hana Chockler, Masoud Ebrahimi, Dana Fisman, Heinz Riener
Safety Synthesis Sans Specification. CoRR (2020)
Heinz Riener, Alan Mishchenko, Mathias Soeken
Exact DAG-Aware Rewriting. DATE (2020)
Fereshte Mozafari, Mathias Soeken, Heinz Riener, Giovanni De Micheli
Automatic Uniform Quantum State Preparation Using Decision Diagrams. ISMVL (2020)
Heinz Riener
Exact Synthesis of LTL Properties from Traces. FDL (2019)
Heinz Riener, Winston Haaswijk, Alan Mishchenko, Giovanni De Micheli, Mathias Soeken
On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis. DATE (2019)
Roderick Bloem, Görschwin Fey, Fabian Greif, Robert Könighofer, Ingo Pill, Heinz Riener, Franz Röck
Synthesizing adaptive test strategies from temporal logic specifications. Formal Methods Syst. Des. 55 (2) (2019)
Giulia Meuli, Bruno Schmitt, Rüdiger Ehlers, Heinz Riener, Giovanni De Micheli
Evaluating ESOP Optimization Methods in Quantum Compilation Flows. RC (2019)
Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
Logic Optimization of Majority-Inverter Graphs. MBMV (2019)
Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
Scalable Generic Logic Synthesis: One Approach to Rule Them All. DAC (2019)
Görschwin Fey, Tara Ghasempouri, Swen Jacobs, Gianluca Martino, Jaan Raik, Heinz Riener
. VLSI-SoC (2018)
Cunxi Yu, Heinz Riener, Francesca Stradolini, Giovanni De Micheli
Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics Model. ISVLSI (2018)
Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli
Size Optimization of MIGs with an Application to QCA and STMG Technologies. NANOARCH (2018)
Roderick Bloem, Görschwin Fey, Fabian Greif, Robert Könighofer, Ingo Pill, Heinz Riener, Franz Röck
Synthesizing Adaptive Test Strategies from Temporal Logic Specifications. CoRR (2018)
Mathias Soeken, Heinz Riener, Winston Haaswijk, Giovanni De Micheli
The EPFL Logic Synthesis Libraries. CoRR (2018)
Jan Malburg, Heinz Riener, Görschwin Fey
Mining Latency Guarantees for RTL Designs. ISMVL (2018)
Heinz Riener, Rüdiger Ehlers, Bruno Schmitt, Giovanni De Micheli
Exact Synthesis of ESOP Forms. CoRR (2018)
Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Görschwin Fey
metaSMT: focus on your application and not on solver integration. Int. J. Softw. Tools Technol. Transf. 19 (5) (2017)
Heinz Riener, Rüdiger Ehlers, Görschwin Fey
CEGAR-based EF synthesis of Boolean functions with an application to circuit rectification. ASP-DAC (2017)
Heinz Riener, Rüdiger Ehlers, Görschwin Fey
Counterexample-Guided EF Synthesis of Boolean Functions. MBMV (2017)
Heinz Riener, Görschwin Fey
Counterexample-guided diagnosis. IVSW (2016)
Niels Thole, Heinz Riener, Görschwin Fey
Equivalence checking on ESL utilizing a priori knowledge. FDL (2016)
Heinz Riener, Görschwin Fey
Exact diagnosis using boolean satisfiability. ICCAD (2016)
Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Görschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Könighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Röck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao
Designing reliable cyber-physical systems overview associated to the special session at FDL'16. FDL (2016)
Heinz Riener, Robert Könighofer, Görschwin Fey, Roderick Bloem
SMT-Based CPS Parameter Synthesis. ARCH@CPSWeek (2016)
Niklas Krafczyk, Heinz Riener, Görschwin Fey
WCET overapproximation for software in the context of a Cyber-Physical System. VLSI-SoC (2016)
Heinz Riener, Michael Kirkedal Thomsen, Görschwin Fey
Execution Tracing of C Code for Formal Analysis (Extended Abstract). MBMV (2015)
Niels Thole, Heinz Riener, Görschwin Fey
Equivalence Checking on System Level Using a Priori Knowledge. DDECS (2015)
Heinz Riener, Rüdiger Ehlers, Görschwin Fey
Path-Based Program Repair. FESCA (2015)
Heinz Riener, Oliver Keszöcze, Rolf Drechsler, Görschwin Fey
A Logic for Cardinality Constraints (Extended Abstract). MBMV (2014)
Heinz Riener, Mathias Soeken, Clemens Werther, Görschwin Fey, Rolf Drechsler
MetaSMT: a unified interface to SMT-LIB2. FDL (2014)
Heinz Riener, Görschwin Fey
Yet a Better Error Explanation Algorithm (Extended Abstract). MBMV (2013)
Heinz Riener, Stefan Frehse, Görschwin Fey
Improving fault tolerance utilizing hardware-software-co-synthesis. DATE (2013)
Heinz Riener, Görschwin Fey
Model-based diagnosis versus error explanation. MEMOCODE (2012)
Heinz Riener, Görschwin Fey
FAuST: A Framework for Formal Verification, Automated Debugging, and Software Test Generation. SPIN (2012)
Heinz Riener, Roderick Bloem, Görschwin Fey
Test Case Generation from Mutants Using Model Checking Techniques. ICST Workshops (2011)

Heinz Riener.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Heinz Riener