Azadeh Davoodi

ORCID

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 38

Top Venues

Publications

Robert Viramontes, Azadeh Davoodi
DIME: Distributed Inference Model Estimation for Minimizing Profiled Latency. SMARTCOMP (2024)
Oliver Sinnen, Qiang Liu, Azadeh Davoodi
Introduction to Special Section on FPT'20. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu
ObfusX: Routing obfuscation with explanatory analysis of a machine learning attack. Integr. 89 (2023)
Robert Viramontes, Azadeh Davoodi
Neural Network Partitioning for Fast Distributed Inference. ISQED (2023)
Cheng-En Wu, Azadeh Davoodi, Yu Hen Hu
Block Pruning for Enhanced Efficiency in Convolutional Neural Networks. CoRR (2023)
Maedeh Hemmat, Azadeh Davoodi, Yu Hen Hu
$\text{Edge}^{n}$ AI: Distributed Inference with Local Edge Devices and Minimal Latency. ASP-DAC (2022)
Maedeh Hemmat, Joshua San Miguel, Azadeh Davoodi
CAP'NN: A Class-aware Framework for Personalized Neural Network Inference. ACM Trans. Embed. Comput. Syst. 21 (5) (2022)
Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu
Sampling-Based Approximate Logic Synthesis: An Explainable Machine Learning Approach. ICCAD (2021)
Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu
ObfusX: Routing Obfuscation with Explanatory Analysis of a Machine Learning Attack. ASP-DAC (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE (2021)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
A Mixture of Experts Approach for Low-Cost DNN Customization. IEEE Des. Test 38 (4) (2021)
Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu
Lorax: Machine Learning-Based Oracle Reconstruction With Minimal I/O Patterns. ISVLSI (2021)
Maedeh Hemmat, Joshua San Miguel, Azadeh Davoodi
AirNN: A Featherweight Framework for Dynamic Input-Dependent Approximation of CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu
Explainable DRC Hotspot Prediction with Random Forest and SHAP Tree Explainer. DATE (2020)
Maedeh Hemmat, Joshua San Miguel, Azadeh Davoodi
CAP'NN: Class-Aware Personalized Neural Network Inference. DAC (2020)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
CHaPR: Efficient Inference of CNNs via Channel Pruning. COINS (2020)
Maedeh Hemmat, Azadeh Davoodi
Power-efficient ReRAM-aware CNN model generation. Integr. 69 (2019)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
Efficient Inference of CNNs via Channel Pruning. CoRR (2019)
Wei Zeng, Boyu Zhang, Azadeh Davoodi
Analysis of Security of Split Manufacturing Using Machine Learning. IEEE Trans. Very Large Scale Integr. Syst. 27 (12) (2019)
Maedeh Hemmat, Azadeh Davoodi
Dynamic Reconfiguration of CNNs for Input-Dependent Approximation. ISQED (2019)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
A Mixture of Expert Approach for Low-Cost Customization of Deep Neural Networks. CoRR (2018)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
Exploring Energy and Accuracy Tradeoff in Structure Simplification of Trained Deep Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (4) (2018)
Boyu Zhang, Jonathon Crandall Magaña, Azadeh Davoodi
Analysis of security of split manufacturing using machine learning. DAC (2018)
Boyu Zhang, Azadeh Davoodi, Yu Hen Hu
Exploring energy and accuracy tradeoff in structure simplification of trained deep neural networks. ASP-DAC (2018)
Wei Zeng, Azadeh Davoodi, Yu Hen Hu
Design Rule Violation Hotspot Prediction Based on Neural Network Ensembles. CoRR (2018)
Jackson Melchert, Boyu Zhang, Azadeh Davoodi
A Comparative Study of Local Net Modeling Using Machine Learning. ACM Great Lakes Symposium on VLSI (2018)
Maedeh Hemmat, Azadeh Davoodi
Power-Efficient ReRAM-Aware CNN Model Generation. ICCD (2018)
Daohang Shi, Edward Tashjian, Azadeh Davoodi
Dynamic Planning of Local Congestion From Varying-Size Vias for Global Routing Layer Assignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (8) (2017)
Daohang Shi, Azadeh Davoodi
TraPL: Track Planning of Local Congestion for Global Routing. DAC (2017)
Jonathon Magaña, Daohang Shi, Jackson Melchert, Azadeh Davoodi
Are Proximity Attacks a Threat to the Security of Split Manufacturing of Integrated Circuits? IEEE Trans. Very Large Scale Integr. Syst. 25 (12) (2017)
Boyu Zhang, Azadeh Davoodi
Technology mapping with all spin logic. DATE (2017)
Daniel P. Seemuth, Azadeh Davoodi, Katherine Morrow
Flexible interconnect in 2.5D ICs to minimize the interposer's metal layers. ASP-DAC (2017)
Daohang Shi, Azadeh Davoodi
Improving Detailed Routability and Pin Access with 3D Monolithic Standard Cells. ISPD (2017)
Jonathon Magaña, Daohang Shi, Azadeh Davoodi
Are proximity attacks a threat to the security of split manufacturing of integrated circuits? ICCAD (2016)
Evangeline F. Y. Young, Azadeh Davoodi
Preface to Special Section on New Physical Design Techniques for the Next Generation of Integration Technology. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Daohang Shi, Edward Tashjian, Azadeh Davoodi
Dynamic planning of local congestion from varying-size vias for global routing layer assignment. ASP-DAC (2016)
Daohang Shi, Azadeh Davoodi, Jeffrey T. Linderoth
A procedure for improving the distribution of congestion in global routing. DATE (2016)
Azadeh Davoodi, Jiang Hu, Muhammet Mustafa Ozdal, Cliff C. N. Sze
Guest Editorial: Special Section on Physical Design Techniques for Advanced Technology Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (4) (2015)
Edward Tashjian, Azadeh Davoodi
On using control signals for word-level identification in a gate-level netlist. DAC (2015)
Daniel P. Seemuth, Azadeh Davoodi, Katherine Morrow
Automatic die placement and flexible I/O assignment in 2.5D IC design. ISQED (2015)
Amir Yazdanbakhsh, David J. Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko H. Lipasti
Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors. ACM Great Lakes Symposium on VLSI (2015)
Min Li, Azadeh Davoodi
A Hybrid Approach for Fast and Accurate Trace Signal Selection for Post-Silicon Debug. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (7) (2014)
Min Li, Azadeh Davoodi
Multi-mode trace signal selection for post-silicon debug. ASP-DAC (2014)
Hamid Shojaei, Azadeh Davoodi, Twan Basten
Collaborative Multiobjective Global Routing. IEEE Trans. Very Large Scale Integr. Syst. 21 (7) (2013)
Azadeh Davoodi, Min Li, Mohammad Tehranipoor
A Sensor-Assisted Self-Authentication Framework for Hardware Trojan Detection. IEEE Des. Test 30 (5) (2013)
Min Li, Azadeh Davoodi
A hybrid approach for fast and accurate trace signal selection for post-silicon debug. DATE (2013)
Hamid Shojaei, Twan Basten, Marc Geilen, Azadeh Davoodi
A fast and scalable multidimensional multiple-choice knapsack heuristic. ACM Trans. Design Autom. Electr. Syst. 18 (4) (2013)
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
Power-Driven Global Routing for Multisupply Voltage Domains. VLSI Design 2013 (2013)
Hamid Shojaei, Azadeh Davoodi, Jeffrey T. Linderoth
Planning for local net congestion in global routing. ISPD (2013)
Hamid Shojaei, Azadeh Davoodi, Parmeswaran Ramanathan
Confidentiality preserving integer programming for global routing. DAC (2012)
Min Li, Azadeh Davoodi, Lin Xie
Custom on-chip sensors for post-silicon failing path isolation in the presence of process variations. DATE (2012)
Min Li, Azadeh Davoodi, Mohammad Tehranipoor
A sensor-assisted self-authentication framework for hardware trojan detection. DATE (2012)
Lin Xie, Azadeh Davoodi
Post-Silicon Failing-Path Isolation Incorporating the Effects of Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (7) (2012)
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
GRIP: Global Routing via Integer Programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (1) (2011)
Tai-Hsuan Wu, Azadeh Davoodi, Jeff T. Linderoth
Power-driven global routing for multi-supply voltage domains. DATE (2011)
Hamid Shojaei, Azadeh Davoodi, Jeffrey T. Linderoth
Congestion analysis for global routing via integer programming. ICCAD (2011)
Lin Xie, Azadeh Davoodi
Bound-Based Statistically-Critical Path Extraction Under Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (1) (2011)
Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu
Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. ASP-DAC (2010)
Lin Xie, Azadeh Davoodi, Kewal K. Saluja
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations. DAC (2010)
Hamid Shojaei, Azadeh Davoodi
Trace signal selection to enhance timing and logic visibility in post-silicon validation. ICCAD (2010)
Hamid Shojaei, Tai-Hsuan Wu, Azadeh Davoodi, Twan Basten
A pareto-algebraic framework for signal power optimization in global routing. ISLPED (2010)
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
A parallel integer programming approach to global routing. DAC (2010)
Lin Xie, Azadeh Davoodi
Representative path selection for post-silicon timing prediction under variability. DAC (2010)
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
GRIP: scalable 3D global routing using integer programming. DAC (2009)
Tai-Hsuan Wu, Azadeh Davoodi
PaRS: Parallel and Near-Optimal Grid-Based Cell Sizing for Library-Based Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (11) (2009)
Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim
Statistical static timing analysis considering leakage variability in power gated designs. ISLPED (2009)
Lin Xie, Azadeh Davoodi, Kewal K. Saluja, Abhishek A. Sinkar
False Path Aware Timing Yield Estimation under Variability. VTS (2009)
Lin Xie, Azadeh Davoodi
Bound-based identification of timing-violating paths under variability. ASP-DAC (2009)
Lin Xie, Azadeh Davoodi, Jun Zhang, Tai-Hsuan Wu
Adjustment-Based Modeling for Timing Analysis Under Variability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (7) (2009)
Jungseob Lee, Lin Xie, Azadeh Davoodi
A Dual-Vt low leakage SRAM array robust to process variations. ISCAS (2008)
Lin Xie, Azadeh Davoodi
Fast and accurate statistical static timing analysis with skewed process parameter variation. IET Circuits Devices Syst. 2 (2) (2008)
Anuj Kumar, Tai-Hsuan Wu, Azadeh Davoodi
SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement. ICCD (2008)
Azadeh Davoodi, Ankur Srivastava
Variability Driven Gate Sizing for Binning Yield Optimization. IEEE Trans. Very Large Scale Integr. Syst. 16 (6) (2008)
Lin Xie, Azadeh Davoodi
Fast and Accurate Statistical Static Timing Analysis with Skewed Process Parameter Variation. ISQED (2008)
Tai-Hsuan Wu, Azadeh Davoodi
PaRS: fast and near-optimal grid-based cell sizing for library-based design. ICCAD (2008)
Tai-Hsuan Wu, Lin Xie, Azadeh Davoodi
A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing. ISLPED (2008)
Lin Xie, Azadeh Davoodi, Jun Zhang, Tai-Hsuan Wu
Adjustment-based modeling for statistical static timing analysis with high dimension of variability. ICCAD (2008)
Lin Xie, Azadeh Davoodi
Robust Estimation of Timing Yield with Partial Statistical Information on Process Variations. ISQED (2008)
Lin Xie, Azadeh Davoodi
Robust Estimation of Timing Yield With Partial Statistical Information on Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (12) (2008)
Tai-Hsuan Wu, Lin Xie, Azadeh Davoodi
A Parallel and Randomized Algorithm for Large-Scale Discrete Dual-Vt Assignment and Continuous Gate Sizing. J. Low Power Electron. 4 (2) (2008)
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak
Statistical timing analysis using Kernel smoothing. ICCD (2007)
Ashish Dobhal, Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava
Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence. VLSI Design (2007)
Jungseob Lee, Azadeh Davoodi
Comparison of Dual-Vt Configurations of SRAM Cell Considering Process-Induced Vt Variations. ISCAS (2007)
Azadeh Davoodi, Ankur Srivastava
Variability driven gate sizing for binning yield optimization. DAC (2006)
Li Wang, Matthew French, Azadeh Davoodi, Deepak Agarwal
FPGA Dynamic Power Minimization through Placement and Routing Constraints. EURASIP J. Embed. Syst. 2006 (2006)
Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava
Probabilistic Evaluation of Solutions in Variability-Driven Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (12) (2006)
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak
A statistical methodology for wire-length prediction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (7) (2006)
Azadeh Davoodi, Ankur Srivastava
Probabilistic evaluation of solutions in variability-driven optimization. ISPD (2006)
Azadeh Davoodi, Ankur Srivastava
Effective techniques for the generalized low-power binding problem. ACM Trans. Design Autom. Electr. Syst. 11 (1) (2006)
Azadeh Davoodi, Ankur Srivastava
Voltage scheduling under unpredictabilities: a risk management paradigm. ACM Trans. Design Autom. Electr. Syst. 10 (2) (2005)
Azadeh Davoodi, Ankur Srivastava
Probabilistic dual-Vth leakage optimization under variability. ISLPED (2005)
Azadeh Davoodi, Ankur Srivastava
Variability-Driven Buffer Insertion Considering Correlations. ICCD (2005)
Azadeh Davoodi, Ankur Srivastava
Simultaneous floorplanning and resource binding: a probabilistic approach. ASP-DAC (2005)
Azadeh Davoodi, Ankur Srivastava
Power-driven simultaneous resource binding and floorplanning: a probabilistic approach. IEEE Trans. Very Large Scale Integr. Syst. 13 (8) (2005)
Azadeh Davoodi, Ankur Srivastava
Wake-up protocols for controlling current surges in MTCMOS-based technology. ASP-DAC (2005)
Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava
selection and assignment for leakage optimization. IEEE Trans. Very Large Scale Integr. Syst. 13 (6) (2005)
Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava
Empirical models for net-length probability distribution and applications. IEEE Trans. Very Large Scale Integr. Syst. 12 (10) (2004)
Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava
High level techniques for power-grid noise immunity. ACM Great Lakes Symposium on VLSI (2004)
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak
Wire-length prediction using statistical techniques. ICCAD (2004)

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Publication Activity (10 Years)

Top Topics

Top Venues

Azadeh Davoodi