Masahiro Fujita

ORCID

Publication Activity (10 Years)

Years Active: 1983-2024
Publications (10 Years): 155

Top Venues

Publications

J. Sharailin Gidon, Jintu Borah, Smrutirekha Sahoo, Shubhankar Majumdar, Masahiro Fujita
Bidirectional LSTM Model for Accurate and Real-Time Landslide Detection: A Case Study in Mawiongrim, Meghalaya, India. IEEE Internet Things J. 11 (3) (2024)
Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh
LUT-based Arithmetic Circuit Approximation with Formal Guarantee on Worst Case Relative Error. LATS (2023)
Sai Sanjeet, Bibhu Datta Sahoo, Masahiro Fujita
Energy-Efficient FPGA Implementation of Power-of-2 Weights-Based Convolutional Neural Networks With Low Bit-Precision Input Images. IEEE Trans. Circuits Syst. II Express Briefs 70 (2) (2023)
Sai Sanjeet, Sannidhi Boppana, Bibhu Datta Sahoo, Masahiro Fujita
Noise Resilience of Reduced Precision Neural Networks. HEART (2023)
Sai Sanjeet, Rahul K. Meena, Bibhu Datta Sahoo, Keshab K. Parhi, Masahiro Fujita
IIR Filter-Based Spiking Neural Network. ISCAS (2023)
Jitendra Kumar, Yukio Miyasaka, Asutosh Srivastava, Masahiro Fujita
Formal Verification of Integer Multiplier Circuits Using Binary Decision Diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Shaowen Li, Yusuke Kimura, Hiroyuki Sato, Junwei Yu, Masahiro Fujita
Parallelizing quantum simulation with decision diagrams. QSW (2023)
Shaowen Li, Yusuke Kimura, Hiroyuki Sato, Junwei Yu, Masahiro Fujita
Parallelizing quantum simulation with decision diagrams. CoRR (2023)
Ahmed Kiyoshi Sugihara, Takehisa Wada, Tamotsu Suda, Masahiro Fujita, Shigeo Kawasaki, Osamu Mori
Wireless Reference Frequency Distribution for Membrane-Deployed Distributed Microwave Interferometer Concept. IGARSS (2023)
Ying Zhang, Yi Ding, Zebo Peng, Huawei Li, Masahiro Fujita, Jianhui Jiang
BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh
Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees. VDAT (2022)
Masahiro Fujita, Yasuoki Iida, Mitsuhiro Hattori, Tadakazu Yamanaka, Nori Matsuda, Satoshi Ito, Hiroaki Kikuchi
Proposal of anonymization dictionary using disclosed statements by business operators. Internet Things 18 (2022)
Anishetti Venkatesh, Chandan Kumar Jha, G. U. Vinod, Masahiro Fujita, Virendra Singh
Scalable Construction of Formal Error Guaranteed LUT-Based Approximate Multipliers with Analytical Worst-Case Error Bound. VDAT (2022)
Heming Sun, Qingyang Yi, Fangzheng Lin, Lu Yu, Jiro Katto, Masahiro Fujita
Real-time Learned Image Codec on FPGA. VCIP (2022)
Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
High-Precision Sub-Nyquist Sampling System Based on Modulated Wideband Converter for Communication Device Testing. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (1) (2022)
Binod Kumar, V. S. Vineesh, Puneet Nemade, Masahiro Fujita
Aries: A Semiformal Technique for Fine-Grained Bug Localization in Hardware Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Xinpei Zhang, Yi Ding, Mingfei Yu, Shin-Ichi O'Uchi, Masahiro Fujita
Low-Precision Quantization Techniques for Hardware-Implementation-Friendly BERT Models. ISQED (2022)
Shinnosuke Nozaki, Ayumi Serizawa, Mizuho Yoshihira, Masahiro Fujita, Yoichi Shibata, Tadakazu Yamanaka, Nori Matsuda, Tetsushi Ohki, Masakatsu Nishigaki
Multi-observed Multi-factor Authentication: A Multi-factor Authentication Using Single Credential. NBiS (2022)
Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh, Ashok Kumar Suhag
Approximating Arithmetic Circuits for IoT Devices Data Processing. Comput. Ind. Eng. 174 (2022)
Jitendra Kumar, Asutosh Srivastava, Masahiro Fujita
Formal Analysis of Integer Multipliers by building Binary Decision Diagram of Adder Trees. ISQED (2022)
Utsav Jana, Sourav Banerjee, Binod Kumar, Madhu B, Shankar Umapathi, Masahiro Fujita
Deep Learning-assisted Scan Chain Diagnosis with Different Fault Models during Manufacturing Test. ATS (2022)
Mingfei Yu, Yukio Miyasaka, Masahiro Fujita
Parallel Scheduling Attention Mechanism: Generalization and Optimization. IPSJ Trans. Syst. LSI Des. Methodol. 15 (2022)
Hari Mohan Gaur, Ashutosh Kumar Singh, Anand Mohan, Masahiro Fujita, Dhiraj K. Pradhan
Design of Single-Bit Fault-Tolerant Reversible Circuits. IEEE Des. Test 38 (2) (2021)
Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita
Logic Synthesis for Generalization and Learning Addition. DATE (2021)
V. S. Vineesh, Binod Kumar, Rushikesh Shinde, Neelam Sharma, Masahiro Fujita, Virendra Singh
Enhanced Design Debugging With Assistance From Guidance-Based Model Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Ryogo Koikel, Masahiro Fujita
Efficient Reachability Analysis Based on Inductive Invariant Using X-value Based Flipflop Selection. ISQED (2021)
Hiroaki Kikuchi, Atsuki Ono, Satoshi Ito, Masahiro Fujita, Tadakazu Yamanaka
Web Crawler for an Anonymously Processed Information Database. IMIS (2021)
Qingyang Yi, Heming Sun, Masahiro Fujita
FPGA Based Accelerator for Neural Networks Computation with Flexible Pipelining. CoRR (2021)
He-Teng Zhang, Masahiro Fujita, Chung-Kuan Cheng, Jie-Hong R. Jiang
SAT-Based On-Track Bus Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE (2021)
Masahiro Fujita, Yasuoki Iida, Mitsuhiro Hattori, Tadakazu Yamanaka, Nori Matsuda, Satoshi Ito, Hiroaki Kikuchi
Proposal and Development of Anonymization Dictionary Using Public Information Disclosed by Anonymously Processed Information Handling Business Operators. IMIS (2021)
Mingfei Yu, Ruitao Gao, Masahiro Fujita
A Decomposition-Based Synthesis Algorithm for Sparse Matrix-Vector Multiplication in Parallel Communication Structure. ASP-DAC (2021)
Masahiro Fujita, Yusuke Kimura, Xingming Le, Yukio Miyasaka, Amir Masoud Gharehbaghi
Synthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations. DATE (2020)
Kenji Ono, Jorji Nonaka, Tomohiro Kawanabe, Masahiro Fujita, Kentaro Oku, Kazuma Hatta
HIVE: A cross-platform, modular visualization framework for large-scale data sets. Future Gener. Comput. Syst. 112 (2020)
Binod Kumar, Jay Adhaduk, Kanad Basu, Masahiro Fujita, Virendra Singh
A Methodology to Capture Fine-Grained Internal Visibility During Multisession Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. 28 (4) (2020)
Yukio Miyasaka, Masahiro Fujita, Alan Mishchenko, John Wawrzynek
SAT-Based Mapping of Data-Flow Graphs onto Coarse-Grained Reconfigurable Arrays. VLSI-SoC (Selected Papers) (2020)
Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
Theoretical Analysis on Noise Performance of Modulated Wideband Converters for Analog Testing. ATS (2020)
Vinod G. U, Vineesh V. S., Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh
LUT-based Circuit Approximation with Targeted Error Guarantees. ATS (2020)
Yukio Miyasaka, Masahiro Fujita
SAT-Based Data-Flow Mapping Onto Array Processor. VLSI-SOC (2020)
Binod Kumar, Swapniel Thakur, Kanad Basu, Masahiro Fujita, Virendra Singh
A Low Overhead Methodology for Validating Memory Consistency Models in Chip Multiprocessors. VLSI Design (2020)
Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
Theoretical Analysis of Noise Figure for Modulated Wideband Converter. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Motoyasu Tanaka, Kazuyuki Kon, Mizuki Nakajima, Nobutaka Matsumoto, Shinnosuke Fukumura, Kosuke Fukui, Hidemasa Sawabe, Masahiro Fujita, Kenjiro Tadakuma
Development and field test of the articulated mobile robot T2 Snake-4 for plant disaster prevention. Adv. Robotics 34 (2) (2020)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
A Logic Optimization Method by Eliminating Redundant Multiple Faults from Higher to Lower Cardinality. IPSJ Trans. Syst. LSI Des. Methodol. 13 (2020)
Yukio Miyasaka, Akihiro Goda, Ashish Mittal, Masahiro Fujita
Synthesis and Generalization of Parallel Algorithm for Matrix-vector Multiplication. IPSJ Trans. Syst. LSI Des. Methodol. 13 (2020)
Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test Patterns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
A Calibration Technique for Simultaneous Estimation of Actual Sensing Matrix Coefficients on Modulated Wideband Converters. IEEE Trans. Circuits Syst. (12) (2020)
Kamal Das, Shubhankar Majumdar, Soumen Moulik, Masahiro Fujita
Real-Time Threshold-based Landslide Prediction System for Hilly Region using Wireless Sensor Networks. ICCE-TW (2020)
Akihiro Goda, Yukio Miyasaka, Amir Masoud Gharehbaghi, Masahiro Fujita
Synthesis and Generalization of Parallel Algorithms Considering Communication Constraints. ISQED (2020)
Nobutaka Matsumoto, Motoyasu Tanaka, Mizuki Nakajima, Masahiro Fujita, Kenjiro Tadakuma
Development of a folding arm on an articulated mobile robot for plant disaster prevention. Adv. Robotics 34 (2) (2020)
Mingfei Yu, Masahiro Fujita
Parallel Scheduling Self-attention Mechanism: Generalization and Optimization. CoRR (2020)
Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh
Post-Silicon Gate-Level Error Localization With Effective and Combined Trace Signal Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Masahiro Fujita, Yukiyasu Domae, Akio Noda, Gustavo Alfonso Garcia Ricardez, Tatsuya Nagatani, Andy Zeng, Shuran Song, Alberto Rodriguez, Albert J. Causo, I-Ming Chen, Tsukasa Ogasawara
What are the important technologies for bin picking? Technology analysis of robots in competitions based on a set of performance metrics. Adv. Robotics 34 (7-8) (2020)
Yuya Shiomi, Genki Sugimoto, Ayaka Sugimoto, Kota Uehara, Masahiro Fujita, Yuto Mano, Tetsushi Ohki, Masakatsu Nishigaki
Micro Biometric Authentication Using Fingernail Surfaces: A Study of Practical Use. AINA (2020)
Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults. VTS (2019)
Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
Automatic Test Pattern Generation for Double Stuck-at Faults Based on Test Patterns of Single Faults. ISQED (2019)
Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita
Approximate DCT Design for Video Encoding Based on Novel Truncation Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2019)
Mayank Palaria, Sai Sanjeet, Bibhu Datta Sahoo, Masahiro Fujita
Adder-Only Convolutional Neural Network with Binary Input Image. MWSCAS (2019)
Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita
Signal Selection Methods for Debugging Gate-Level Sequential Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2019)
Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs. VLSI Circuits (2019)
Binod Kumar, Masahiro Fujita, Virendra Singh
A Methodology for SAT-Based Electrical Error Debugging During Post-Silicon Validation. VLSI Design (2019)
Masahiro Fujita
AI x Robotics: Technology Challenges and Opportunities in Sensors, Actuators, and Integrated Circuits. ISSCC (2019)
Masahiro Fujita, Yukiyasu Domae, Ryosuke Kawanishi, Gustavo Alfonso Garcia Ricardez, Kenta Kato, Koji Shiratsuchi, Rintaro Haraguchi, Ryosuke Araki, Hironobu Fujiyoshi, Shuichi Akizuki, Manabu Hashimoto, Albert J. Causo, Akio Noda, Haruhisa Okuda, Tsukasa Ogasawara
Bin-picking Robot using a Multi-gripper Switching Strategy based on Object Sparseness. CASE (2019)
Binod Kumar, Masahiro Fujita, Virendra Singh
SAT-based Silicon Debug of Electrical Errors under Restricted Observability Enhancement. J. Electron. Test. 35 (5) (2019)
Binod Kumar, Atul Kumar Bhosale, Masahiro Fujita, Virendra Singh
Validating Multi-Processor Cache Coherence Mechanisms under Diminished Observability. ATS (2019)
Motoyasu Tanaka, Kenjiro Tadakuma, Mizuki Nakajima, Masahiro Fujita
Task-Space Control of Articulated Mobile Robots With a Soft Gripper for Operations. IEEE Trans. Robotics 35 (1) (2019)
Masahiro Fujita
Basic and Advanced Researches in Logic Synthesis and their Industrial Contributions. ISPD (2019)
Yukio Miyasaka, Ashish Mittal, Masahiro Fujita
Synthesis of Algorithm Considering Communication Structure of Distributed/Parallel Computing. ISQED (2019)
Qinhao Wang, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
High-Level Engineering Change Through Programmable Datapath and SMT Solvers. ISCAS (2019)
Satyadev Ahlawat, Jaynarayan T. Tudu, Manoj Singh Gaur, Masahiro Fujita, Virendra Singh
Preventing Scan Attack through Test Response Encryption. DFT (2019)
Tomohiro Maruoka, Yukio Miyasaka, Akihiro Goda, Amir Masoud Gharehbaghi, Masahiro Fujita
Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints. ISCAS (2019)
Kota Uehara, Kohei Mukaiyama, Masahiro Fujita, Hiroki Nishikawa, Takumi Yamamoto, Kiyoto Kawauchi, Masakatsu Nishigaki
Basic Study on Targeted E-mail Attack Method Using OSINT. AINA (2019)
Satyadev Ahlawat, Kailash Ahirwar, Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh
Securing Scan through Plain-text Restriction. IOLTS (2019)
Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita
Signal Selection Methods for Efficient Multi-Target Correction. ISCAS (2019)
Qi Lu, Amir Masoud Gharehbaghi, Masahiro Fujita
Approximate Arithmetic Circuit Design Using a Fast and Scalable Method. VLSI-SoC (2019)
Masoud Shiroei, Bijan Alizadeh, Masahiro Fujita
Data-path aware high-level ECO synthesis. Integr. 65 (2019)
Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita
C Description Reconstruction Method from a Revised Netlist for ECO Support. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2018)
Darshit Vaghani, Satyadev Ahlawat, Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh
On Securing Scan Design Through Test Vector Encryption. ISCAS (2018)
Masahiro Fujita, Suguru Ikeda, Toshiaki Fujimoto, Toshihiko Shimizu, Shuhei Ikemoto, Takeshi Miyamoto
Development of universal vacuum gripper for wall-climbing robot. Adv. Robotics 32 (6) (2018)
Peikun Wang, Conrad J. Moore, Amir Masoud Gharehbaghi, Masahiro Fujita
An ATPG Method for Double Stuck-At Faults by Analyzing Propagation Paths of Single Faults. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Hiroyuki Suzuki, Hiromasa Masuda, Kazuo Hongo, Ryuta Horie, Shunsuke Yajima, Yuki Itotani, Masahiro Fujita, Ken'ichiro Nagasaka
Development and Testing of Force-Sensing Forceps Using FBG for Bilateral Micro-Operation System. IEEE Robotics Autom. Lett. 3 (4) (2018)
Toral Shah, Anzhela Yu. Matrosova, Masahiro Fujita, Virendra Singh
Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design. J. Electron. Test. 34 (1) (2018)
Jorji Nonaka, Kenji Ono, Masahiro Fujita
234Compositor: A flexible parallel image compositing framework for massively parallel visualization environments. Future Gener. Comput. Syst. 82 (2018)
Genki Sugimoto, Masahiro Fujita, Yuto Mano, Tetsushi Ohki, Masakatsu Nishigaki
Micro Disposable Biometric Authentication: An Application Using Fingernail Minute Textures for Nonsensitive Services. ICBSP (2018)
Kenjiro Tadakuma, Eri Takane, Masahiro Fujita, Akito Nomura, Hirone Komatsu, Masashi Konyo, Satoshi Tadokoro
Planar Omnidirectional Crawler Mobile Mechanism - Development of Actual Mechanical Prototype and Basic Experiments. IEEE Robotics Autom. Lett. 3 (1) (2018)
Jorji Nonaka, Motohiko Matsuda, Takashi Shimizu, Naohisa Sakamoto, Masahiro Fujita, Keiji Onishi, Eduardo C. Inacio, Shun Ito, Fumiyoshi Shoji, Kenji Ono
A Study on Open Source Software for Large-Scale Data Visualization on SPARC64fx based HPC Systems. HPC Asia (2018)
Ankit Jindal, Binod Kumar, Nitish Jindal, Masahiro Fujita, Virendra Singh
Silicon Debug with Maximally Expanded Internal Observability Using Nearest Neighbor Algorithm. ISVLSI (2018)
Jorji Nonaka, Kenji Ono, Naohisa Sakamoto, Kengo Hayashi, Motohiko Matsuda, Fumiyoshi Shoji, Kentaro Oku, Masahiro Fujita, Kazuma Hatta
A Large Data Visualization Framework for SPARC64 fx HPC Systems - Case Study: K Computer Operational Environment -. LDAV (2018)
Ankit Jindal, Binod Kumar, Kanad Basu, Masahiro Fujita
ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis. VLSI Design (2018)
Shuhei Maeda, Satoru Ohshita, Kazuma Furutani, Yuto Yakubo, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda, Masahiro Fujita, Shunpei Yamazaki
-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors. ISSCC (2018)
Amir Masoud Gharehbaghi, Tomohiro Maruoka, Masahiro Fujita
A New Reconfigurable Architecture with Applications to IoT and Mobile Computing. IFIPIoT@WCC (2018)
Antara Ganguly, Virendra Singh, Rajeev Muralidhar, Masahiro Fujita
Memory-system requirements for convolutional neural networks. MEMSYS (2018)
Masahiro Fujita, Kenjiro Tadakuma, Hirone Komatsu, Eri Takane, Akito Nomura, Tomoya Ichimura, Masashi Konyo, Satoshi Tadokoro
Jamming layered membrane gripper mechanism for grasping differently shaped-objects without excessive pushing force for search and rescue missions. Adv. Robotics 32 (11) (2018)
Toral Shah, Anzhela Yu. Matrosova, Binod Kumar, Masahiro Fujita, Virendra Singh
Testing multiple stuck-at faults of ROBDD based combinational circuit design. LATS (2017)
Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita
A low-cost approximate 32-point transform architecture. ISCAS (2017)
Munehiro Kozuma, Yuki Okamoto, Takashi Nakagawa, Takeshi Aoki, Yoshiyuki Kurokawa, Takayuki Ikeda, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Makoto Ikeda, Masahiro Fujita, Shunpei Yamazaki
Subthreshold Operation of CAAC-IGZO FPGA by Overdriving of Programmable Routing Switch and Programmable Power Switch. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Conrad J. Moore, Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
Test pattern generation for multiple stuck-at faults not covered by test patterns for single faults. ISCAS (2017)
Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh
On Testing of Superscalar Processors in Functional Mode for Delay Faults. VLSI Design (2017)
Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS. IEEE J. Solid State Circuits 52 (4) (2017)
Binod Kumar, Ankit Jindal, Masahiro Fujita, Virendra Singh
Post-silicon observability enhancement with topology based trace signal selection. LATS (2017)

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Publication Activity (10 Years)

Top Topics

Top Venues

Masahiro Fujita