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Formal Verification of Integer Multiplier Circuits Using Binary Decision Diagrams.
Jitendra Kumar
Yukio Miyasaka
Asutosh Srivastava
Masahiro Fujita
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2023)
Keyphrases
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formal verification
binary decision diagrams
symbolic model checking
model checking
floating point
model checker
temporal logic
bounded model checking
automated verification
boolean functions
hardware implementation
formal specification
variable ordering
formal methods
relational databases
data mining
database