Ying Zhang

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 14

Top Topics

Parallel Genetic Algorithm

Network On Chip

Bounded Model Checking

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

J. Electron. Test.

Publications

Zhanhui Shi, Jie Xiao, Jianhui Jiang, Ying Zhang, Yuhao Zhou
Identifying Reliability High-Correlated Gates of Logic Circuits With Pearson Correlation Coefficient. IEEE Trans. Circuits Syst. II Express Briefs 71 (4) (2024)
Zhanhui Shi, Jie Xiao, Jianhui Jiang, Ying Zhang, Yuhao Zhou
ARA-RCIV: Identifying Reliability-Critical Input Vectors of Logic Circuits Based on the Association Rules Analysis Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (8) (2024)
Ying Zhang, Pengfei Ji, Pan-Wei Zhu, Zebo Peng, Hua-Wei Li, Jian-Hui Jiang
Parallel Software-Based Self-Testing with Bounded Model Checking for Kilo-Core Networks-on-Chip. J. Comput. Sci. Technol. 38 (2) (2023)
Ying Zhang, Yi Ding, Zebo Peng, Huawei Li, Masahiro Fujita, Jianhui Jiang
BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Ying Zhang, Xinpeng Hong, Zhongsheng Chen, Zebo Peng, Jianhui Jiang
A Deterministic-Path Routing Algorithm for Tolerating Many Faults on Very-Large-Scale Network-on-Chip. ACM Trans. Design Autom. Electr. Syst. 26 (1) (2021)
Jiaqi Zhang, Ying Zhang, Huawei Li, Jianhui Jiang
HIT: A Hidden Instruction Trojan Model for Processors. DATE (2020)
Ying Zhang, Weihong Yu, Xiaodong Chen, Jianhui Jiang
Parallel Genetic Algorithm to Extend the Lifespan of Internet of Things in 5G Networks. IEEE Access 8 (2020)
Ying Zhang, Krishnendu Chakrabarty, Zebo Peng, Ahmed Rezine, Huawei Li, Petru Eles, Jianhui Jiang
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (3) (2020)
Zhongsheng Chen, Ying Zhang, Zebo Peng, Jianhui Jiang
A Deterministic-Path Routing Algorithm for Tolerating Many Faults on Wafer-Level NoC. DATE (2019)
Ying Zhang, Lu Yu, Huawei Li, Jianhui Jiang
Small Trojan Testing Using Bounded Model Checking. ITC-Asia (2018)
Ying Zhang, Li Ling, Jianhui Jiang, Jie Xiao
Thermal-aware SoC Test Scheduling with Voltage/Frequency Scaling and Test Partition. J. Electron. Test. 34 (4) (2018)
Ying Zhang, Krishnendu Chakrabarty, Huawei Li, Jianhui Jiang
Software-based online self-testing of network-on-chip using bounded model checking. ITC (2017)
Minhui Ke, Ying Zhang, Jianhui Jiang
High-level Fault Diagnosis on network-on-chip using path tracking. VLSI-DAT (2017)
Ying Zhang, Zebo Peng, Jianhui Jiang, Huawei Li, Masahiro Fujita
Temperature-aware software-based self-testing for delay faults. DATE (2015)
Ying Zhang, Huawei Li, Xiaowei Li
Automatic Test Program Generation Using Executing-Trace-Based Constraint Extraction for Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 21 (7) (2013)
Ying Zhang, Ahmed Rezine, Petru Eles, Zebo Peng
Automatic Test Program Generation for Out-of-Order Superscalar Processors. Asian Test Symposium (2012)
Ying Zhang, Huawei Li, Yinghua Min, Xiaowei Li
Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Ying Zhang, Huawei Li, Xiaowei Li
Software-Based Self-Testing of Processors Using Expanded Instructions. Asian Test Symposium (2010)
Ying Zhang, Huawei Li, Xiaowei Li
Selected Crosstalk Avoidance Code for Reliable Network-on-Chip. J. Comput. Sci. Technol. 24 (6) (2009)
Ying Zhang, Huawei Li, Xiaowei Li
Reliable Network-on-Chip Router for Crosstalk and Soft Error Tolerance. ATS (2008)
Ying Zhang, Huawei Li, Xiaowei Li, Yu Hu
Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects. VTS (2008)