Yinghua Min

Publication Activity (10 Years)

Years Active: 1982-2011
Publications (10 Years): 0

Publications

Ying Zhang, Huawei Li, Yinghua Min, Xiaowei Li
Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Ruilian Zhao, Michael R. Lyu, Yinghua Min
Automatic string test data generation for detecting domain errors. Softw. Test. Verification Reliab. 20 (3) (2010)
Jie Wang, Huawei Li, Yinghua Min, Xiaowei Li, Huaguo Liang
Impact of Hazards on Pattern Selection for Small Delay Defects. PRDC (2009)
Guangxing Zhang, Gaogang Xie, Jianhua Yang, Yinghua Min, Zhaomin Zhou, Xiaodong Duan
Accurate Online Traffic Classification with Multi-Phases Identification Methodology. CCNC (2008)
Gaogang Xie, Guangxing Zhang, Jianhua Yang, Yinghua Min, Valérie Issarny, Alberto Conte
Survey on Traffic of Metro Area Network with Measurement On-Line. International Teletraffic Congress (2007)
T. Cheng, J. Abraham, S. Mir, Yinghua Min, J. Wang, Cheng-Wen Wu
Test Education in the Global Economy. ATS (2007)
Kun Xie, Yinghua Min, Dafang Zhang, Jigang Wen, Gaogang Xie
A Scalable Bloom Filter for Membership Queries. GLOBECOM (2007)
Jie Wu, Feng Gao, Zhongcheng Li, Yinghua Min
Optimal, and reliable communication in hypercubes using extended safety vectors. IEEE Trans. Reliab. 54 (3) (2005)
Yuan-sheng Luo, Dafang Zhang, Yinghua Min
An Improved Scheme of Index-Based Checkpointing. PRDC (2005)
Debesh K. Das, Hideo Fujiwara, Yungang Li, Yinghua Min, Shiyi Xu, Yervant Zorian
Design & Test Education in Asia. IEEE Des. Test Comput. 21 (4) (2004)
Jianhui Jiang, Yinghua Min, Chenglian Peng
Fault-Tolerant Systems with Concurrent Error-Locating Capability. J. Comput. Sci. Technol. 18 (2) (2003)
Yinghua Min, Jishun Kuang, Xiaoyan Niu
At-Speed Current Testing. Asian Test Symposium (2003)
Zhigang Yin, Yinghua Min, Xiaowei Li, Huawei Li
A Novel RT-Level Behavioral Description Based ATPG Method. J. Comput. Sci. Technol. 18 (3) (2003)
Ruilian Zhao, Michael R. Lyu, Yinghua Min
Domain Testing Based on Character String Predicate. Asian Test Symposium (2003)
Jishun Kuang, Zhiqiang Yang, Qijian Zhu, Yinghua Min
IDDT: Fundamentals and Test Generation. J. Comput. Sci. Technol. 18 (3) (2003)
Ruilian Zhao, Michael R. Lyu, Yinghua Min
A New Software Testing Approach Based on Domain Analysis of Specifications and Programs. ISSRE (2003)
Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min
Test Power Optimization Techniques for CMOS Circuits. Asian Test Symposium (2002)
Zuying Luo, Yinghua Min, Shiyuan Yang, Xiaowei Li
The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications. Sci. China Ser. F Inf. Sci. 45 (6) (2002)
Yinghua Min
Why RTL ATPG? J. Comput. Sci. Technol. 17 (2) (2002)
Huawei Li, Yinghua Min, Zhongcheng Li
Clustering of behavioral phases in FSMs and its applications to VLSI test. Sci. China Ser. F Inf. Sci. 45 (6) (2002)
Zhigang Yin, Yinghua Min, Xiaowei Li
An Approach to RTL Fault Extraction and Test Generation. Asian Test Symposium (2001)
Huawei Li, Yinghua Min, Zhongcheng Li
An RT-Level ATPG Based on Clustering of Circuit States. Asian Test Symposium (2001)
Dafang Zhang, Gaogang Xie, Yinghua Min
Node Grouping in System-Level Fault Diagnosis. J. Comput. Sci. Technol. 16 (5) (2001)
Xiaowei Li, Huawei Li, Yinghua Min
Reducing Power Dissipation during At-Speed Test Application. DFT (2001)
Jie Wu, Feng Gao, Zhongcheng Li, Yinghua Min
Optimal Fault-Tolerant Routing in Hypercubes Using Extended Safety Vectors. ICPADS (2000)
Huawei Li, Zhongcheng Li, Yinghua Min
Reduction of Number of Paths to be Tested in Delay Testing. J. Electron. Test. 16 (5) (2000)
Lijian Li, Xiaoyang Yu, Cheng-Wen Wu, Yinghua Min
A waveform simulator based on Boolean process. Asian Test Symposium (2000)
Lijian Li, Yinghua Min
An efficient BIST design using LFSR-ROM architecture. Asian Test Symposium (2000)
Jianhui Jiang, Hongbao Shi, Yinghua Min, Xiaodong Zhao
A Novel NMR Structure with Concurrent Error Location Capabilities. PRDC (1999)
Yinghua Min, Zhongcheng Li
An analytical delay model. J. Comput. Sci. Technol. 14 (2) (1999)
Huawei Li, Zhongcheng Li, Yinghua Min
Delay Testing with Double Observations. Asian Test Symposium (1998)
Zhongcheng Li, Yinghua Min, Robert K. Brayton
A New Low-Cost Method for Identifying Untestable Path Delay Faults. Asian Test Symposium (1998)
Yingquan Zhou, Mike W. T. Wong, Yinghua Min
On concurrent multiple error diagnosability in linear analog circuits using continuous checksum. Int. J. Circuit Theory Appl. 26 (1) (1998)
Yinghua Min, Zhongcheng Li
IDDT Testing versus IDDQ Testing. J. Electron. Test. 13 (1) (1998)
Wangning Long, Yinghua Min, Shiyuan Yang, Shibai Tong
Short-time scaling of variable ordering of OBDDs. J. Comput. Sci. Technol. 12 (4) (1997)
Wangning Long, Shiyuan Yang, Zhongcheng Li, Yinghua Min
Memory Efficient ATPG for Path Delay Faults. Asian Test Symposium (1997)
Xiaoming Yu, Yinghua Min
Design of delay-verifiable combinational logic by adding extra inputs. Asian Test Symposium (1997)
Zhuxing Zhao, Yinghua Min, Zhongcheng Li
Path sensitization. J. Comput. Sci. Technol. 12 (3) (1997)
Zhongcheng Li, Yuhong Zhao, Yinghua Min, Robert K. Brayton
Timed Binary Decision Diagrams. ICCD (1997)
Yinghua Min, Zhuxing Zhao, Zhongcheng Li
IDDT Testing. Asian Test Symposium (1997)
Zhongcheng Li, Robert K. Brayton, Yinghua Min
Efficient Identification of Non-Robustly Untestable Path Delay Faults. ITC (1997)
Zhuxing Zhao, Zhongcheng Li, Yinghua Min
Waveform Polynomial Manipulation Using Bdds. Asian Test Symposium (1996)
Yingquan Zhou, Yinghua Min
A kind of Multistage Interconnection Networks with multiple paths. J. Comput. Sci. Technol. 11 (4) (1996)
Yingquan Zhou, Mike W. T. Wong, Yinghua Min
Hardware reduction in continuous checksum-based analog checkers: Algorithm and its analysis. J. Electron. Test. 9 (1-2) (1996)
Yinghua Min, Zhuxing Zhao, Zhongcheng Li
An Analytical Delay Model Based on Boolean Process. VLSI Design (1996)
Yingquan Zhou, Mike W. T. Wong, Yinghua Min
Feasibility and Effectiveness of the Algorithm for Overhead Reduction in Analog Checkers. FTCS (1995)
Yinghua Min, Zhuxing Zhao, Zhongcheng Li
Boolean process-an analytical approach to circuit representation (II). Asian Test Symposium (1995)
Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, Sandip Kundu, Chung-Len Lee, Yinghua Min, P. Pal Chaudhuri
Panel: New Research Problems in the Emerging Test Technology. Asian Test Symposium (1995)
Youli Min, Yinghua Min
A fault-tolerant and heuristic routing algorithm for faulty hypercubes. J. Comput. Sci. Technol. 10 (6) (1995)
Yinghua Min, Yutang Zhou, Zhongcheng Li, Cheng Ye, Yuqi Pan
Behavioral Design and Prototyping of a Fail-Safe System. VLSI Design (1994)
Yinghua Min, Zhongcheng Li
Evaluation of test generation algorithms. VTS (1993)
Yinghua Min, Yashwant K. Malaiya, Boping Jin
Analysis of Detection Capability of Parallel Signature Analyzers. IEEE Trans. Computers 40 (9) (1991)
Yinghua Min, Jintao Li
Strongly fault secure PLAs and totally self-checking checkers. IEEE Trans. Computers 37 (6) (1988)
Yinghua Min, Zhongcheng Li
Pseudo-Exhaustive Testing Strategy for Large Combinational Circuits. Comput. Syst. Sci. Eng. 1 (4) (1986)
Yinghua Min, Stephen Y. H. Su
Testing functional faults in VLSI. DAC (1982)