Test Power Optimization Techniques for CMOS Circuits.

Zuying Luo Xiaowei Li Huawei Li Shiyuan Yang Yinghua Min

Published in: Asian Test Symposium (2002)

Keyphrases

power consumption
power dissipation
analog vlsi
chip design
high speed
low power
circuit design
power reduction
delay insensitive
vlsi circuits
low cost
cmos technology
case study
power management
analog circuits
power saving
real time
built in self test
test data
control system
image processing