Jishun Kuang

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 10

Top Topics

Top Venues

IEICE Electron. Express

J. Circuits Syst. Comput.

HPCC/SmartCity/DSS

Publications

Jinhui Tan, Jishun Kuang, Xing Hu, Xiaomin Cai, Jiahe Shi
The design of ΔΣ-ADC in MEMS gyro interface ASIC. Microelectron. J. 134 (2023)
Jinhui Tan, Jishun Kuang, Xing Hu, Lin Xiao
Small-Signal Processing Low-Overhead Operational Amplifier for delta-Sigma ADC. J. Circuits Syst. Comput. 31 (17) (2022)
Minghe Zhang, Jishun Kuang, Jing Huang, Renfa Li
Improving Compression Ratios for Code-Based Test Pattern Compressions through Column-Wise Reordering Algorithms. J. Circuits Syst. Comput. 30 (6) (2021)
Zaihong He, Jishun Kuang, Yanjie Tan, Wenjie Liu, Bin Sheng
Design and Implementation of GPU Accelerated Active Storage in FastDFS. HPCC/SmartCity/DSS (2019)
Minghe Zhang, Jishun Kuang, Jing Huang, Zhiqiang You
A Pseudo-Random Transform Decomposition Method for Improving the Coding Compression Ratio of Test Data. HPCC/SmartCity/DSS (2019)
Zaihong He, Jishun Kuang, Yanjie Tan, Shihui Peng, Huailiang Tan
LPCMsim: A Lightweight Phase Change Memory Simulator. Future Gener. Comput. Syst. 97 (2019)
Yan Chen, Zhiqiang You, Yingjie Zhang, Jishun Kuang, Jing Zhang
A novel memristor-based restricted Boltzmann machine for contrastive divergence. IEICE Electron. Express 15 (2) (2018)
Liao Wu, Jishun Kuang, Zhiqiang You, Peng Liu, Shuo Cai
A parallel-SSHI rectifier for ultra-low-voltage piezoelectric vibration energy harvesting. IEICE Electron. Express 13 (17) (2016)
Ling Zhang, Jishun Kuang
Representative Scan Architecture. J. Circuits Syst. Comput. 25 (5) (2016)
Yingbo Zhou, Jishun Kuang
A sort method to enhance significant spectral components of test set. ICNC-FSKD (2016)
Peng Liu, Zhiqiang You, Jishun Kuang, Zhipeng Hu, Weizheng Wang
Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm. IEICE Electron. Express 12 (23) (2015)
Liao Wu, Dong Sam Ha, Jishun Kuang, Xuan-Dien Do, Sang-Gug Lee
An active rectifier with optimal flip timing for the internal capacitor for piezoelectric vibration energy harvesting. MWSCAS (2015)
Tieqiao Liu, Jishun Kuang, Shuo Cai, Zhiqiang You
An efficient small-delay faults simulator based on critical path tracing. Int. J. Circuit Theory Appl. 43 (8) (2015)
Jishun Kuang, Liang Zhang, Zhiqiang You, Yingbo Zhou
Improve the compression ratios for code-based test vector compressions by decomposing. ETS (2015)
Weiwei Wang, Zhiqiang You, Peng Liu, Jishun Kuang
An adaptive neural network A/D converter based on CMOS/memristor hybrid design. IEICE Electron. Express 11 (24) (2014)
Bosheng Liu, Zhiqiang You, Xiangrao Li, Jishun Kuang, Zheng Qin
Comparator and half adder design using complementary resistive switches crossbar. IEICE Electron. Express 10 (13) (2013)
Ling Zhang, Jishun Kuang, Zhiqiang You
Virtual scan chains reordering using a RAM-based module for high test compression. Microelectron. J. 43 (11) (2012)
Zhiqiang You, Weizheng Wang, Peng Liu, Jishun Kuang, Zheng Qin
A scan disabling-based BAST scheme for test cost and test power reduction. IEICE Electron. Express 9 (2) (2012)
Weizheng Wang, Jishun Kuang, Zhiqiang You
Achieving low capture and shift power in linear decompressor-based test compression environment. Microelectron. J. 43 (2) (2012)
Weizheng Wang, Jishun Kuang, Peng Liu, Xin Peng, Zhiqiang You
Switching activity reduction for scan-based BIST using weighted scan input data. IEICE Electron. Express 9 (10) (2012)
Zhiqiang You, Weizheng Wang, Zhiping Dou, Peng Liu, Jishun Kuang
A scan disabling-based BAST scheme for test cost reduction. IEICE Electron. Express 8 (16) (2011)
Ling Zhang, Jishun Kuang
A New Test Data Compression Scheme. J. Comput. 6 (7) (2011)
Ling Zhang, Jishun Kuang, Zhiqiang You
Test data compression using interval broadcast scan for embedded cores. Microelectron. J. 42 (11) (2011)
Ling Zhang, Jishun Kuang, Zhiqiang You
Test Data Compression Using Selective Sparse Storage. J. Electron. Test. 27 (4) (2011)
Ling Zhang, Jishun Kuang, Zhiqiang You
Test Data Compression Using Four-Coded and Sparse Storage for Testing Embedded Core. ICA3PP (2) (2010)
Zhiqiang You, Jiedi Huang, Michiko Inoue, Jishun Kuang, Hideo Fujiwara
Capture in Turn Scan for Reduction of Test Data Volume, Test Application Time and Test Power. Asian Test Symposium (2010)
Li Liu, Jishun Kuang, Huawei Li
Small Delay Fault Simulation for Sequential Circuits. PRDC (2009)
Gui Dai, Zhiqiang You, Jishun Kuang, Jiedi Huang
DCScan: A Power-Aware Scan Testing Architecture. ATS (2008)
Jishun Kuang, Ouyang Xiong, Zhiqiang You
A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself. ATS (2008)
Yong-sheng Cheng, Zhiqiang You, Jishun Kuang
Test Response Data Volume and Wire Length Reductions for Extended Compatibilities Scan Tree Construction. DELTA (2008)
Ling Zhang, Jishun Kuang
A New BIST Solution for System-on-Chip. PRDC (2005)
Yinghua Min, Jishun Kuang, Xiaoyan Niu
At-Speed Current Testing. Asian Test Symposium (2003)
Jishun Kuang, Yu Wang, Xiaofen Wei, Changnian Zhang
IDDT ATPG Based on Ambiguous Delay Assignments. Asian Test Symposium (2003)
Jishun Kuang, Zhiqiang Yang, Qijian Zhu, Yinghua Min
IDDT: Fundamentals and Test Generation. J. Comput. Sci. Technol. 18 (3) (2003)