Jie Xiao

Publication Activity (10 Years)

Years Active: 2022-2024
Publications (10 Years): 10

Top Topics

Association Rules

Failure Diagnosis

Top Venues

IEEE Trans. Computers

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Reliab.

Int. J. Intell. Syst.

Publications

Zhanhui Shi, Jie Xiao, Weidong Zhu, Jianhui Jiang
A Reliability-Critical Path Identifying Method With Local and Global Adjacency Probability Matrix in Combinational Circuits. IEEE Trans. Computers 73 (1) (2024)
Haixia Long, Zihao Chen, Xinli Xu, Qianwei Zhou, Zhaolin Fang, Mingqi Lv, Xu-Hua Yang, Jie Xiao, Hui Sun, Ming Fan
Elucidating genetic and molecular basis of altered higher-order brain structure-function coupling in major depressive disorder. NeuroImage 297 (2024)
Jie Xiao, Yingying Ge, Ru Wang, Jungang Lou
ICP-RL: Identifying Critical Paths for Fault Diagnosis Using Reinforcement Learning. ACM Trans. Design Autom. Electr. Syst. 29 (1) (2024)
Zhanhui Shi, Jie Xiao, Jianhui Jiang, Ying Zhang, Yuhao Zhou
Identifying Reliability High-Correlated Gates of Logic Circuits With Pearson Correlation Coefficient. IEEE Trans. Circuits Syst. II Express Briefs 71 (4) (2024)
Zhanhui Shi, Jie Xiao, Jianhui Jiang, Ying Zhang, Yuhao Zhou
ARA-RCIV: Identifying Reliability-Critical Input Vectors of Logic Circuits Based on the Association Rules Analysis Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (8) (2024)
Jie Xiao, Yujian Yang, Haixia Long, Rongzhen Qin, Jungang Lou
Estimating Redundancy-Reliability of CNNs Based on Strip-Median Attributes. IEEE Trans. Very Large Scale Integr. Syst. 31 (10) (2023)
Jie Xiao, Weidong Zhu, Qing Shen, Haixia Long, Jungang Lou
A Pruning and Feedback Strategy for Locating Reliability-Critical Gates in Combinational Circuits. IEEE Trans. Reliab. 72 (3) (2023)
Jie Xiao, Qiou Ji, Qing Shen, Jianhui Jiang, Yujiao Huang, Jungang Lou
Accelerating stochastic-based reliability estimation for combinational circuits at RTL using GPU parallel computing. Int. J. Intell. Syst. 37 (11) (2022)
Jie Xiao, Zhanhui Shi, Xuhua Yang, Jungang Lou
BM-RCGL: Benchmarking Approach for Localization of Reliability-Critical Gates in Combinational Logic Blocks. IEEE Trans. Computers 71 (5) (2022)
Jie Xiao, Wenbo Chen, Jungang Lou, Jianhui Jiang, Qianwei Zhou
Identifying Reliability-Critical Primary Inputs of Combinational Circuits Based on the Model of Gate-Sensitive Attributes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)