Dhiraj K. Pradhan

Publication Activity (10 Years)

Years Active: 1972-2021
Publications (10 Years): 13

Top Venues

J. Low Power Electron.

ISED

DATE

ACM Trans. Embed. Comput. Syst.

Publications

Hari Mohan Gaur, Ashutosh Kumar Singh, Anand Mohan, Masahiro Fujita, Dhiraj K. Pradhan
Design of Single-Bit Fault-Tolerant Reversible Circuits. IEEE Des. Test 38 (2) (2021)
Mohamad Imran Bin Bandan, Samuel Nascimento Pagliarini, Jimson Mathew, Dhiraj K. Pradhan
Improved Multiple Faults-Aware Placement Strategy: Reducing the Overheads and Error Rates in Digital Circuits. IEEE Trans. Reliab. 66 (1) (2017)
Jimson Mathew, Rajat Subhra Chakraborty, Dhiraj K. Pradhan
Guest Editorial: Special Issue on "Secure and Fault-Tolerant Embedded Computing". ACM Trans. Embed. Comput. Syst. 16 (4) (2017)
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
Selected Articles from the IEEE ISED 2016 Conference. J. Low Power Electron. 13 (4) (2017)
Urbi Chatterjee, Rajat Subhra Chakraborty, Jimson Mathew, Dhiraj K. Pradhan
Memristor Based Arbiter PUF: Cryptanalysis Threat and Its Mitigation. VLSI Design (2016)
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
Selected Articles from the IEEE ISED 2014 Conference. J. Low Power Electron. 11 (3) (2015)
Yuanfan Yang, Jimson Mathew, Marco Ottavi, Salvatore Pontarelli, Dhiraj K. Pradhan
2T2M memristor based TCAM cell for low power applications. DTIS (2015)
Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
). IEEE Trans. Very Large Scale Integr. Syst. 23 (8) (2015)
Jimson Mathew, Rajat Subhra Chakraborty, Durga Prasad Sahoo, Yuanfan Yang, Dhiraj K. Pradhan
A Novel Memristor-Based Hardware Security Primitive. ACM Trans. Embed. Comput. Syst. 14 (3) (2015)
Jimson Mathew, Yuamfam Yang, M. Ottavia, T. Browna, A. Zampettia, A. Di Carloa, A. M. Jabirb, Dhiraj K. Pradhan
Fault detection and repair of DSC arrays through memristor sensing. DFTS (2015)
Jimson Mathew, Rajat Subhra Chakraborty, Durga Prasad Sahoo, Yuanfan Yang, Dhiraj K. Pradhan
A novel memristor based physically unclonable function. Integr. 51 (2015)
Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays. DFTS (2015)
Rishad A. Shafik, Jimson Mathew, Dhiraj K. Pradhan
A Low-Cost Unified Design Methodology for Secure Test and Intellectual Property Core Protection. IEEE Trans. Reliab. 64 (4) (2015)
Jimson Mathew, Marco Ottavi, Yunfan Yang, Dhiraj K. Pradhan
Using memristor state change behavior to identify faults in photovoltaic arrays. DFT (2014)
Yuanfan Yang, Jimson Mathew, Dhiraj K. Pradhan, Marco Ottavi, Salvatore Pontarelli
Complementary resistive switch based stateful logic operations using material implication. DATE (2014)
Yuanfan Yang, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan
Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis. IEEE Embed. Syst. Lett. 6 (1) (2014)
Luo Sun, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan, Zhen Li
A low power and robust carbon nanotube 6T SRAM design with metallic tolerance. DATE (2014)
Luo Sun, Jimson Mathew, Samuel N. Pagliarini, Dhiraj K. Pradhan, Ioannis Sourdis
Design and Analysis of Binary Tree Static Random Access Memory for Low Power Embedded Systems. J. Low Power Electron. 10 (3) (2014)
Mohamad Imran Bin Bandan, Subhasis Bhattacharjee, Dhiraj K. Pradhan, Jimson Mathew
Energy Efficient Lifetime Reliability-Aware Checkpointing for Real-Time System. J. Low Power Electron. 10 (3) (2014)
Ioannis Sourdis, Christos Strydis, Antonino Armato, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Sebastián Isaza, Alirad Malek, R. Mariani, Samuel N. Pagliarini, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard K. Rauwerda, Robert M. Seepers, Rishad Ahmed Shafik, Georgios Smaragdos, Dimitris Theodoropoulos, Stavros Tzilis, Michalis Vavouras
DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs. ARC (2014)
Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner, Dhiraj K. Pradhan
A hybrid reliability assessment method and its support of sequential logic modelling. IOLTS (2014)
Adedotun Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
Write scheme for multiple Complementary Resistive Switch (CRS) cells. PATMOS (2014)
Samuel N. Pagliarini, Dhiraj K. Pradhan
A placement strategy for reducing the effects of multiple faults in digital circuits. IOLTS (2014)
Li Gang, Jimson Mathew, Dhiraj K. Pradhan
Multinomial Memristor Model for Simulations and Analysis. ISED (2013)
Mohamad Imran Bin Bandan, Subhasis Bhattacharjee, Rishad A. Shafik, Dhiraj K. Pradhan, Jimson Mathew
Lifetime Reliability-Aware Checkpointing Mechanism: Modelling and Analysis. ISED (2013)
Xiaoyu Huang, Jimson Mathew, Rishad A. Shafik, Subhasis Bhattacharjee, Dhiraj K. Pradhan
A fast and Effective DFT for test and diagnosis of power switches in SoCs. DATE (2013)
Ioannis Sourdis, Christos Strydis, Antonino Armato, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Sebastián Isaza, Alirad Malek, R. Mariani, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard K. Rauwerda, Robert M. Seepers, Rishad A. Shafik, Kim Sunesen, Dimitris Theodoropoulos, Stavros Tzilis, Michalis Vavouras
DeSyRe: On-demand system reliability. Microprocess. Microsystems 37 (8-C) (2013)
Rishad A. Shafik, Gerard K. Rauwerda, Jordy Potman, Kim Sunesen, Dhiraj K. Pradhan, Jimson Mathew, Ioannis Sourdis
Software Modification Aided Transient Error Tolerance for Embedded Systems. DSD (2013)
Luo Sun, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan
Low Power and Robust Binary Tree SRAM Design for Embedded Systems. ISED (2013)
Jimson Mathew, Saraju P. Mohanty, Shibaji Banerjee, Dhiraj K. Pradhan, Abusaleh M. Jabir
Attack tolerant cryptographic hardware design by combining error correction and uniform switching activity. Comput. Electr. Eng. 39 (4) (2013)
Rishad A. Shafik, Bashir M. Al-Hashimi, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
RAEF: A Power Normalized System-Level Reliability Analysis and Estimation Framework. ISVLSI (2012)
Pranav Yeolekar, Rishad A. Shafik, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
STEP: a unified design methodology for secure test and IP core protection. ACM Great Lakes Symposium on VLSI (2012)
Ioannis Sourdis, Christos Strydis, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Alirad Malek, R. Mariani, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard K. Rauwerda, Kim Sunesen, Stavros Tzilis
The DeSyRe Project: On-Demand System Reliability. DSD (2012)
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases. VDAT (2012)
Saraju P. Mohanty, Jawar Singh, Elias Kougianos, Dhiraj K. Pradhan
Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM. Integr. 45 (1) (2012)
Luo Sun, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
Enhanced Statistical Blockade Approaches for Fast Robustness Estimation and Compensation of Nano-CMOS Circuits. J. Low Power Electron. 8 (3) (2012)
Costas Argyrides, Raul Chipana, Fabian Vargas, Dhiraj K. Pradhan
Reliability Analysis of H-Tree Random Access Memories Implemented With Built in Current Sensors and Parity Codes for Multiple Bit Upset Correction. IEEE Trans. Reliab. 60 (3) (2011)
Jimson Mathew, Koushik Maharatna, Babita R. Jose, Hafizur Rahaman, Dhiraj K. Pradhan
Pseudo-Parallel Datapath Structure for Power Optimal Implementation of 128-pt FFT/IFFT for WPAN. Circuits Syst. Signal Process. 30 (4) (2011)
Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty, Maciej J. Ciesielski
Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage Optimization. VLSI Design (2011)
Costas Argyrides, Dhiraj K. Pradhan, Taskin Koçak
Matrix Codes for Reliable and Cost Efficient Memory Chips. IEEE Trans. Very Large Scale Integr. Syst. 19 (3) (2011)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
Single-Event Transient Analysis in High Speed Circuits. ISED (2011)
Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan, Saraju P. Mohanty
BCH code based multiple bit error correction in finite field multiplier circuits. ISQED (2011)
Juan Antonio Maestro, Pedro Reviriego, Costas Argyrides, Dhiraj K. Pradhan
Fault Tolerant Single Error Correction Encoders. J. Electron. Test. 27 (2) (2011)
Luo Sun, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
Statistical Blockade Method for Fast Robustness Estimation and Compensation of Nano-CMOS Arithmetic Circuits. ISED (2011)
Shibaji Banerjee, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan, Maciej J. Ciesielski
A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS Register-Transfer Level Leakage Optimization. J. Low Power Electron. 7 (4) (2011)
Vishram Mishra, Jimson Mathew, Dhiraj K. Pradhan
Fault-tolerant de-Bruijn graph based multipurpose architecture and routing protocol for wireless sensor networks. Int. J. Sens. Networks 10 (3) (2011)
Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan
Low Latency and Energy Efficient Scalable Architecture for Massive NoCs Using Generalized de Bruijn Graph. IEEE Trans. Very Large Scale Integr. Syst. 19 (8) (2011)
Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Bhargab B. Bhattacharya, Saraju P. Mohanty
A Routing-Aware ILS Design Technique. IEEE Trans. Very Large Scale Integr. Syst. 19 (12) (2011)
Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields. ECCTD (2011)
Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
applications. ASP-DAC (2010)
Jimson Mathew, Abusaleh M. Jabir, Ashutosh Kumar Singh, Hafizur Rahaman, Dhiraj K. Pradhan
A Galois field-based logic synthesis with testability. IET Comput. Digit. Tech. 4 (4) (2010)
Garima Thakral, Saraju P. Mohanty, Dhiraj K. Pradhan, Elias Kougianos
DOE-ILP Based Simultaneous Power and Read Stability Optimization in Nano-CMOS SRAM. J. Low Power Electron. 6 (3) (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM. VLSI Design (2010)
Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
Investigating the impact of NBTI on different power saving cache strategies. DATE (2010)
Saraju P. Mohanty, Dhiraj K. Pradhan
/high-kappa nano-CMOS universal level shifter for system-level power management. ACM J. Emerg. Technol. Comput. Syst. 6 (2) (2010)
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir, Saraju P. Mohanty, Dhiraj K. Pradhan
On the design of different concurrent EDC schemes for S-Box and GF(p). ISQED (2010)
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
) with testability. IET Comput. Digit. Tech. 4 (5) (2010)
Savita Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
Layout-aware Illinois Scan design for high fault coverage coverage. ISQED (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM. ACM Great Lakes Symposium on VLSI (2010)
Nikolaos Mavrogiannakis, Costas Argyrides, Dhiraj K. Pradhan
Improving reliability for bit parallel finite field multipliers using Decimal Hamming. EWDTS (2010)
Jimson Mathew, Savita Banerjee, Hafizur Rahaman, Dhiraj K. Pradhan, Saraju P. Mohanty, Abusaleh M. Jabir
On the synthesis of attack tolerant cryptographic hardware. VLSI-SoC (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP. ISQED (2010)
Costas Argyrides, Nikolaos Mavrogiannakis, Dhiraj K. Pradhan
Improved Yield in Nanotechnology Circuits Using Non-square Meshes. ISVLSI (2010)
Jimmy Tarrillo, Carlos Arthur Lang Lisbôa, Luigi Carro, Costas Argyrides, Dhiraj K. Pradhan
Evaluation of a new low cost software level fault tolerance technique to cope with soft errors. LATW (2010)
Anas Abu Taleb, Jimson Mathew, Dhiraj K. Pradhan
Fault diagnosis in multi layered De Bruijn based architectures for sensor networks. PerCom Workshops (2010)
Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dhiraj K. Pradhan
A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead. ISQED (2010)
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
). IEEE Trans. Very Large Scale Integr. Syst. 18 (9) (2010)
Taskin Koçak, Dhiraj K. Pradhan
Introduction to design techniques for energy harvesting. ACM J. Emerg. Technol. Comput. Syst. 6 (2) (2010)
Anas Abu Taleb, Jimson Mathew, Dhiraj K. Pradhan
Clustered De Bruijn Based Multi Layered Architectures for Sensor Networks. WiMo (2010)
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
Secure Testable S-box Architecture for Cryptographic Hardware Implementation. Comput. J. 53 (5) (2010)
Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan
Increasing memory yield in future technologies through innovative design. ISQED (2009)
Dmitri Maslov, Jimson Mathew, Donny Cheung, Dhiraj K. Pradhan
. Quantum Inf. Comput. 9 (7&8) (2009)
Jimson Mathew, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
). IET Comput. Digit. Tech. 3 (3) (2009)
Costas Argyrides, Giorgos Dimosthenous, Dhiraj K. Pradhan, Carlos Arthur Lang Lisbôa, Luigi Carro
Reliability aware yield improvement technique for nanotechnology based circuits. SBCCI (2009)
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
C-testable S-box implementation for secure advanced encryption standard. IOLTS (2009)
Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro
Single element correction in sorting algorithms with minimum delay overhead. LATW (2009)
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew
Single ended 6T SRAM with isolated read-port for low-power embedded systems. DATE (2009)
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. VLSI Design (2009)
Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro
A fast error correction technique for matrix multiplication algorithms. IOLTS (2009)
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies. SoCC (2008)
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir
). ACM Trans. Design Autom. Electr. Syst. 13 (1) (2008)
Carlos Arthur Lang Lisbôa, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro
Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. VTS (2008)
Jimson Mathew, Hafizur Rahaman, Babita R. Jose, Dhiraj K. Pradhan
Design of Reversible Finite Field Arithmetic Circuits with Error Detection. VLSI Design (2008)
Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan
De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs. DATE (2008)
Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan
Fault Tolerant Reversible Finite Field Arithmetic Circuits. IOLTS (2008)
Costas Argyrides, Stephania Loizidou Himona, Dhiraj K. Pradhan
Yield improvement and power aware low cost memory chips. WREFT@CF (2008)
Jayawant Kakade, Dimitrios Kagaris, Dhiraj K. Pradhan
Evaluation of Generalized LFSRs as Test Pattern Generators in Two-Dimensional Scan Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (9) (2008)
Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan
Pseudo parallel architecture for AES with error correction. SoCC (2008)
Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan
Area Reliability Trade-Off in Improved Reed Muller Coding. SAMOS (2008)
Dhiraj K. Pradhan
Application of Galois Fields to Logic Synthesis. ICIIS (2008)
Donny Cheung, Dmitri Maslov, Jimson Mathew, Dhiraj K. Pradhan
On the Design and Optimization of a Quantum Polynomial-Time Attack on Elliptic Curve Cryptography. TQC (2008)
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty
Failure analysis for ultra low power nano-CMOS SRAM under process variations. SoCC (2008)
Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan
A Galois Field Based Logic Synthesis Approach with Testability. VLSI Design (2008)
Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection. IOLTS (2008)
Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan
Fault tolerant bit parallel finite field multipliers using LDPC codes. ISCAS (2008)
Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
Single Error Correcting Finite Field Multipliers Over GF(2m). VLSI Design (2008)
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty
A single ended 6T SRAM cell design for ultra-low-voltage applications. IEICE Electron. Express 5 (18) (2008)
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
A nano-CMOS process variation induced read failure tolerant SRAM cell. ISCAS (2008)
Hongwei Zhu, Ilie I. Luican, Florin Balasa, Dhiraj K. Pradhan
Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2008)
Saraju P. Mohanty, Elias Kougianos, Dhiraj K. Pradhan
Simultaneous scheduling and binding for low gate leakage nano-complementary metaloxide-semiconductor data path circuit behavioural synthesis. IET Comput. Digit. Tech. 2 (2) (2008)

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Publication Activity (10 Years)

Top Topics

Top Venues

Dhiraj K. Pradhan