Garima Thakral

Publication Activity (10 Years)

Years Active: 2010-2014
Publications (10 Years): 0

Top Topics

Cmos Image Sensor

Top Venues

Microelectron. J.

ACM Great Lakes Symposium on VLSI

Publications

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral, Oghenekarho Okobiah
Variability-aware design of double gate FinFET-based current mirrors. ACM Great Lakes Symposium on VLSI (2014)
Dhruva Ghai, Saraju P. Mohanty, Garima Thakral
Comparative analysis of double gate FinFET configurations for analog circuit design. MWSCAS (2013)
Dhruva Ghai, Saraju P. Mohanty, Garima Thakral
Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm. Microelectron. J. 44 (8) (2013)
Dhruva Ghai, Saraju P. Mohanty, Garima Thakral
Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study. ISQED (2013)
Dhruva Ghai, Saraju P. Mohanty, Garima Thakral
Double gate FinFET based mixed-signal design: A VCO case study. MWSCAS (2013)
Garima Thakral, Saraju P. Mohanty, Dhiraj K. Pradhan, Elias Kougianos
DOE-ILP Based Simultaneous Power and Read Stability Optimization in Nano-CMOS SRAM. J. Low Power Electron. 6 (3) (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM. VLSI Design (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM. ACM Great Lakes Symposium on VLSI (2010)
Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan
P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP. ISQED (2010)