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VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases.

Hafizur RahamanJimson MathewAbusaleh M. JabirDhiraj K. Pradhan
Published in: VDAT (2012)
Keyphrases
  • vlsi architecture
  • bit parallel
  • pattern matching
  • vlsi implementation
  • low complexity
  • low power
  • regular expressions
  • real time
  • high speed
  • power consumption
  • metadata
  • object oriented
  • low cost
  • neural network model