Ahmad A. Al-Yamani

Publication Activity (10 Years)

Years Active: 2000-2010
Publications (10 Years): 0

Publications

Ahmad A. Al-Yamani, Edward J. McCluskey
Test Set Compression Through Alternation Between Deterministic and Pseudorandom Test Patterns. J. Electron. Test. 26 (5) (2010)
Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan
Increasing memory yield in future technologies through innovative design. ISQED (2009)
Aiman H. El-Maleh, Mustafa Imran Ali, Ahmad A. Al-Yamani
Reconfigurable broadcast scan compression using relaxation-based test vector decomposition. IET Comput. Digit. Tech. 3 (2) (2009)
Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda
Comparative study of centralised and distributed compatibility-based test data compression. IET Comput. Digit. Tech. 2 (2) (2008)
Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda
Systematic Scan Reconfiguration. ASP-DAC (2007)
Aiman H. El-Maleh, Mustafa Imran Ali, Ahmad A. Al-Yamani
A Reconfigurable Broadcast Scan Compression Scheme Using Relaxation Based Test Vector Decompos. ATS (2007)
Costas Argyrides, Ahmad A. Al-Yamani, Dhiraj K. Pradhan
High defect tolerant low cost memory chips. SoCC (2007)
Ahmad A. Al-Yamani
Energy-delay efficient test. IET Comput. Digit. Tech. 1 (5) (2007)
Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Erik Chmelar, M. Grinchuk, Arun Gunda
Scan Test Cost and Power Reduction Through Systematic Scan Reconfiguration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (5) (2007)
Ahmad A. Al-Yamani, S. Ramsundar, Dhiraj K. Pradhan
A Defect Tolerance Scheme for Nanotechnology Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2007)
S. Ramsundar, Ahmad A. Al-Yamani, Dhiraj K. Pradhan
Defect Tolerance in Nanotechnology Switches Using a Greedy Reconfiguration Algorithm. ISQED (2007)
Ahmad A. Al-Yamani
DFT for controlled-impedance I/O buffers. DAC (2006)
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
Optimized reseeding by seed ordering and encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (2) (2005)
Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda
Should Illinois-Scan Based Architectures be Centralized or Distributed? DFT (2005)
Ahmad A. Al-Yamani, Edward J. McCluskey
BIST-Guided ATPG. ISQED (2005)
Ahmad A. Al-Yamani, Erik Chmelar, Mikhail Grinchuck
Segmented Addressable Scan Architecture. VTS (2005)
Ahmad A. Al-Yamani, Edward J. McCluskey
Test chip experimental results on high-level structural test. ACM Trans. Design Autom. Electr. Syst. 10 (4) (2005)
Intaik Park, Ahmad A. Al-Yamani, Edward J. McCluskey
Effective TARO Pattern Generation. VTS (2005)
Ahmad A. Al-Yamani, Edward J. McCluskey
Test quality for high level structural test. HLDVT (2004)
Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra
ELF-Murphy Data on Defects and Test Sets. VTS (2004)
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
Bist Reseeding with very few Seeds. VTS (2003)
Ahmad A. Al-Yamani, Edward J. McCluskey
Built-In Reseeding for Serial Bist. VTS (2003)
Ahmad A. Al-Yamani, Edward J. McCluskey
Seed encoding with LFSRs and cellular automata. DAC (2003)
Ahmad A. Al-Yamani, Sadiq M. Sait, Hassan R. Barada, Habib Youssef
Parallel Tabu Search in a Heterogeneous Environment. IPDPS (2003)
Ahmad A. Al-Yamani, Sadiq M. Sait, Habib Youssef, Hassan R. Barada
Parallelizing Tabu Search on a Cluster of Heterogeneous Workstations. J. Heuristics 8 (3) (2002)
Ahmad A. Al-Yamani, Sadiq M. Sait, Hassan R. Barada
HPTS: heterogeneous parallel tabu search for VLSI placement. IEEE Congress on Evolutionary Computation (2002)
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey
Testing Digital Circuits with Constraints. DFT (2002)
Ahmad A. Al-Yamani, Nahmsuk Oh, Edward J. McCluskey
Performance Evaluation of Checksum-Based ABFT. DFT (2001)
Sadiq M. Sait, Habib Youssef, Hassan R. Barada, Ahmad A. Al-Yamani
A parallel tabu search algorithm for VLSI standard-cell placement. ISCAS (2000)