Priyadarsan Patra

Publication Activity (10 Years)

Years Active: 1994-2020
Publications (10 Years): 6

Top Topics

Newspaper Articles

Panel Discussion

Top Venues

J. Low Power Electron.

Publications

Deepa Mathew, Bijoy Antony Jose, Jimson Mathew, Priyadarsan Patra
Enabling Hardware Performance Counters for Microkernel-Based Virtualization on Embedded Systems. IEEE Access 8 (2020)
Monalisa Mandal, Sanjeeb Kumar Sahoo, Priyadarsan Patra, Saurav Mallik, Zhongming Zhao
In silico ranking of phenolics for therapeutic effectiveness on cancer stem cells. BMC Bioinform. (21) (2020)
Jimson Mathew, Bijoy Antony Jose, Priyadarsan Patra
Selected Articles from the ISED 2018 Conference. J. Low Power Electron. 15 (2) (2019)
Sankaran M. Menon, Ashish Gupta, Chinna Prudvi, Rolf Kühnis, Sukhbinder Singh Takhar, Spencer K. Millican, Eric Rentschler, Pandy Kalimuthu, Preeti Ranjan Panda, Priyadarsan Patra
Techniques for Debug of Low Power SoCs. MTV (2019)
Deepa Mathew, Bijoy Antony Jose, Priyadarsan Patra
Performance Analysis of Microkernel Based Virtualization Techniques on Embedded Systems. J. Low Power Electron. 15 (2) (2019)
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
Selected Articles from the IEEE ISED 2016 Conference. J. Low Power Electron. 13 (4) (2017)
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
Selected Articles from the IEEE ISED 2014 Conference. J. Low Power Electron. 11 (3) (2015)
Priyadarsan Patra, Chinna Prudvi
Fabrics on Die: Where Function, Debug and Test Meet. NOCS (2015)
Jimson Mathew, A. Prasad Vinod, Priyadarsan Patra
Selected Articles from the IEEE ISED 2013 Conference. J. Low Power Electron. 10 (3) (2014)
Jimson Mathew, Priyadarsan Patra
Selected Articles from the IEEE ISED 2012 Conference. J. Low Power Electron. 9 (3) (2013)
Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir
Dynamic Selection of Trace Signals for Post-Silicon Debug. MTV (2013)
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults. VLSI Design (2013)
Arindam Sarkar, J. K. Mandal, Priyadarsan Patra
Double Layer Perceptron Synchronized Computational Intelligence Guided Fractal Triangle Based Cryptographic Technique for Secured Communication (DLPFT). ISED (2013)
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
Constrained signal selection for post-silicon validation. HLDVT (2012)
Oleg Garitselov, Saraju P. Mohanty, Elias Kougianos, Priyadarsan Patra
Bee Colony Inspired Metamodeling Based Fast Optimization of a Nano-CMOS PLL. ISED (2011)
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
Efficient combination of trace and scan signals for post silicon validation and debug. ITC (2011)
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos, Priyadarsan Patra
A PVT aware accurate statistical logic library for high- metal-gate nano-CMOS. ISQED (2009)
Kaiyu Chen, Sharad Malik, Priyadarsan Patra
Runtime validation of memory ordering using constraint graph checking. HPCA (2008)
Kaiyu Chen, Sharad Malik, Priyadarsan Patra
Runtime Validation of Transactional Memory Systems. ISQED (2008)
Bin Li, Li-Shiuan Peh, Priyadarsan Patra
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration. NOCS (2008)
Priyadarsan Patra
On the cusp of a validation wall. IEEE Des. Test Comput. 24 (2) (2007)
Kavel M. Büyüksahin, Priyadarsan Patra, Farid N. Najm
ESTIMA: an architectural-level power estimator for multi-ported pipelined register files. ISLPED (2003)
B. Chappell, Xinning Wang, Priyadarsan Patra, Prashant Saxena, J. Vendrell, Satyanarayan Gupta, S. Varadarajan, W. Gomes, S. Hussain, H. Krishnamurthy, M. Venkateshmurthy, S. Jain
A System-Level Solution to Domino Synthesis with 2 GHz Application. ICCD (2002)
Priyadarsan Patra, Stanislav Polonsky, Donald S. Fussell
Delay Insensitive Logic for RSFQ Superconductor Technology. ASYNC (1997)
Priyadarsan Patra, Donald S. Fussell
Efficient Delay-Insensitive RSFQ Circuits. ICCD (1996)
Priyadarsan Patra, Donald S. Fussell
Power-efficient delay-insensitive codes for data transmission. HICSS (1) (1995)
Priyadarsan Patra, Donald S. Fussell
Fully asynchronous, robust, high-throughput arithmetic structures. VLSI Design (1995)
Priyadarsan Patra, Donald S. Fussell
Efficient building blocks for delay insensitive circuits. ASYNC (1994)