Sharad Malik

ORCID

Publication Activity (10 Years)

Years Active: 1988-2024
Publications (10 Years): 48

Top Venues

CoRR

DATE

ICCAD

ACM Trans. Design Autom. Electr. Syst.

Publications

Bo-Yuan Huang, Steven Lyubomirsky, Yi Li, Mike He, Gus Henry Smith, Thierry Tambe, Akash Gaonkar, Vishal Canumalla, Andrew Cheung, Gu-Yeon Wei, Aarti Gupta, Zachary Tatlock, Sharad Malik
Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface. ACM Trans. Design Autom. Electr. Syst. 29 (2) (2024)
Yi Li, Aarti Gupta, Sharad Malik
Exact Scheduling to Minimize Off-Chip Data Movement for Deep Learning Accelerators. ASPDAC (2024)
Qinhan Tan, Yuheng Yang, Thomas Bourgeat, Sharad Malik, Mengjia Yan
RTL Verification for Secure Speculation Using Contract Shadow Logic. CoRR (2024)
Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin
Security Verification of Low-Trust Architectures. CCS (2023)
Yi Li, Aarti Gupta, Sharad Malik
Combined Scheduling, Memory Allocation and Tensor Replacement for Minimizing Off-Chip Data Accesses of DNN Accelerators. CoRR (2023)
Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms. DAC (2023)
Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin
Security Verification of Low-Trust Architectures. CoRR (2023)
Huaixi Lu, Yue Xing, Aarti Gupta, Sharad Malik
SoC Protocol Implementation Verification Using Instruction-Level Abstraction Specifications. ACM Trans. Design Autom. Electr. Syst. 28 (6) (2023)
Qi Nie, Sharad Malik
CNNFlow: Memory-driven Data Flow Optimization for Convolutional Neural Networks. ACM Trans. Design Autom. Electr. Syst. 28 (3) (2023)
Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik
Compositional Verification Using a Formal Component and Interface Specification. ICCAD (2022)
Bo-Yuan Huang, Steven Lyubomirsky, Yi Li, Mike He, Thierry Tambe, Gus Henry Smith, Akash Gaonkar, Vishal Canumalla, Gu-Yeon Wei, Aarti Gupta, Zachary Tatlock, Sharad Malik
Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface. CoRR (2022)
Yu Zeng, Aarti Gupta, Sharad Malik
Automatic Generation of Architecture-Level Models from RTL Designs for Processors and Accelerators. DATE (2022)
Yue Xing, Aarti Gupta, Sharad Malik
Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models. ASP-DAC (2022)
Qinhan Tan, Aarti Gupta, Sharad Malik
Usage-Based RTL Subsetting for Hardware Accelerators. ICCAD (2022)
Hongce Zhang, Aarti Gupta, Sharad Malik
Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking. VMCAI (2021)
Yu Zeng, Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables. ICCAD (2021)
Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik
Leveraging Processor Modeling and Verification for General Hardware Modules. DATE (2021)
Lauren Biernacki, Mark Gallagher, Zhixing Xu, Misiker Tadesse Aga, Austin Harris, Shijia Wei, Mohit Tiwari, Baris Kasikci, Sharad Malik, Todd M. Austin
Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses. ACM J. Emerg. Technol. Comput. Syst. 17 (3) (2021)
Qi Nie, Sharad Malik
MemFlow: Memory-Driven Data Scheduling With Datapath Co-Design in Accelerators for Large-Scale Inference Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (9) (2020)
Hongce Zhang, Weikun Yang, Grigory Fedyukovich, Aarti Gupta, Sharad Malik
Synthesizing Environment Invariants for Modular Hardware Verification. VMCAI (2020)
Pareesa Ameneh Golnari, Sharad Malik
Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration (long version). CoRR (2019)
Sharad Malik, Pareesa Ameneh Golnari
Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration. ASAP (2019)
Qi Nie, Sharad Malik
SpFlow: Memory-Driven Data Flow Optimization for Sparse Matrix-Matrix Multiplication. ISCAS (2019)
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. ACM Trans. Design Autom. Electr. Syst. 24 (1) (2019)
Burçin Çakir, Sharad Malik
Revealing Cluster Hierarchy in Gate-level ICs Using Block Diagrams and Cluster Estimates of Circuit Embeddings. ACM Trans. Design Autom. Electr. Syst. 24 (5) (2019)
Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin
Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn. ASPLOS (2019)
Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions. TACAS (1) (2019)
Pramod Subramanyan, Bo-Yuan Huang, Yakir Vizel, Aarti Gupta, Sharad Malik
Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (8) (2018)
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. CoRR (2018)
Yue Xing, Bo-Yuan Huang, Aarti Gupta, Sharad Malik
A formal instruction-level GPU model for scalable verification. ICCAD (2018)
Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, Sharad Malik
Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware. DAC (2018)
Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari
Vulnerability-tolerant secure architectures. ICCAD (2018)
Burçin Çakir, Sharad Malik
Reverse Engineering Digital ICs through Geometric Embedding of Circuit Graphs. ACM Trans. Design Autom. Electr. Syst. 23 (4) (2018)
Weikun Yang, Yakir Vizel, Pramod Subramanyan, Aarti Gupta, Sharad Malik
Lazy Self-composition for Security Verification. CAV (2) (2018)
Hongce Zhang, Caroline Trippel, Yatin A. Manerkar, Aarti Gupta, Margaret Martonosi, Sharad Malik
ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. FMCAD (2018)
Qi Nie, Sharad Malik
MemFlow: Memory-driven data scheduling with datapath co-design in accelerators for large-scale inference applications. ASP-DAC (2018)
Yakir Vizel, Alexander Nadel, Sharad Malik
Solving Constraints over Bit-Vectors with SAT-based Model Checking. SMT (2017)
Zhixing Xu, Sayak Ray, Pramod Subramanyan, Sharad Malik
Malware detection using machine learning based analysis of virtual memory access patterns. DATE (2017)
Yakir Vizel, Arie Gurfinkel, Sharon Shoham, Sharad Malik
IC3 - Flipping the E in ICE. VMCAI (2017)
Pareesa Ameneh Golnari, Yavuz Yetim, Margaret Martonosi, Yakir Vizel, Sharad Malik
PPU: A Control Error-Tolerant Processor for Streaming Applications with Formal Guarantees. ACM J. Emerg. Technol. Comput. Syst. 13 (3) (2017)
Zhixing Xu, Aarti Gupta, Sharad Malik
Trace-based Analysis of Memory Corruption Malware Attacks. Haifa Verification Conference (2017)
Yakir Vizel, Alexander Nadel, Sharad Malik
Solving linear arithmetic with SAT-based model checking. FMCAD (2017)
Pareesa Ameneh Golnari, Sharad Malik
Evaluating matrix representations for error-tolerant computing. DATE (2017)
Pramod Subramanyan, Sharad Malik, Hareesh Khattri, Abhranil Maiti, Jason M. Fung
Verifying information flow properties of firmware using symbolic execution. DATE (2016)
Sharad Malik, Pramod Subramanyan
Invited - Specification and modeling for systems-on-chip security verification. DAC (2016)
Kuldeep S. Meel, Moshe Y. Vardi, Supratik Chakraborty, Daniel J. Fremont, Sanjit A. Seshia, Dror Fried, Alexander Ivrii, Sharad Malik
Constrained Sampling and Counting: Universal Hashing Meets SAT Solving. AAAI Workshop: Beyond NP (2016)
Alexander Ivrii, Sharad Malik, Kuldeep S. Meel, Moshe Y. Vardi
On computing minimal independent support and its applications to sampling and counting. Constraints An Int. J. 21 (1) (2016)
Divjyot Sethi, Muralidhar Talupur, Sharad Malik
Model checking unbounded concurrent lists. Int. J. Softw. Tools Technol. Transf. 18 (4) (2016)
Yakir Vizel, Georg Weissenbacher, Sharad Malik
Boolean Satisfiability Solvers and Their Applications in Model Checking. Proc. IEEE 103 (11) (2015)
Sharad Malik
Detecting Hardware Trojans: A Tale of Two Techniques. FMCAD (2015)
Pramod Subramanyan, Yakir Vizel, Sayak Ray, Sharad Malik
Template-based Synthesis of Instruction-Level Abstractions for SoC Verification. FMCAD (2015)
Kuldeep S. Meel, Moshe Y. Vardi, Supratik Chakraborty, Daniel J. Fremont, Sanjit A. Seshia, Dror Fried, Alexander Ivrii, Sharad Malik
Constrained Sampling and Counting: Universal Hashing Meets SAT Solving. CoRR (2015)
Pramod Subramanyan, Sayak Ray, Sharad Malik
Evaluating the security of logic encryption algorithms. HOST (2015)
Yakir Vizel, Arie Gurfinkel, Sharad Malik
Fast Interpolating BMC. CAV (1) (2015)
Sunha Ahn, Sharad Malik, Aarti Gupta
Completeness bounds and sequentialization for model checking of interacting firmware and hardware. CODES+ISSS (2015)
Yavuz Yetim, Sharad Malik, Margaret Martonosi
CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution. ASPLOS (2015)
Ameneh Golnari, Yakir Vizel, Sharad Malik
Error-Tolerant Processors: Formal Specification and Verification. ICCAD (2015)
Burçin Çakir, Sharad Malik
Hardware Trojan detection for gate-level ICs using signal correlation based clustering. DATE (2015)
Charlie Shucheng Zhu, Sharad Malik
Optimizing dynamic trace signal selection using machine learning and linear programming. DATE (2015)
Divjyot Sethi, Muralidhar Talupur, Sharad Malik
Using Flow Specifications of Parameterized Cache Coherence Protocols for Verifying Deadlock Freedom. ATVA (2014)
Divjyot Sethi, Muralidhar Talupur, Sharad Malik
Using Flow Specifications of Parameterized Cache Coherence Protocols for Verifying Deadlock Freedom. CoRR (2014)
Shuyuan Zhang, Franjo Ivancic, Cristian Lumezanu, Yifei Yuan, Aarti Gupta, Sharad Malik
An Adaptable Rule Placement for Software-Defined Networks. DSN (2014)
Ryan Beckett, Xuan Kelvin Zou, Shuyuan Zhang, Sharad Malik, Jennifer Rexford, David Walker
An assertion language for debugging SDN applications. HotSDN (2014)
Shuyuan Zhang, Sharad Malik, Sanjai Narain, Laurent Vanbever
In-Band Update for Network Routing Policy Migration. ICNP (2014)
Yinlei Yu, Pramod Subramanyan, Nestan Tsiskaridze, Sharad Malik
All-SAT Using Minimal Blocking Clauses. VLSI Design (2014)
Sayak Ray, Sharad Malik
Effective abstraction for response proof of communication fabrics. NOCS (2014)
Pramod Subramanyan, Nestan Tsiskaridze, Wenchao Li, Adrià Gascón, Wei Yang Tan, Ashish Tiwari, Natarajan Shankar, Sanjit A. Seshia, Sharad Malik
Reverse Engineering Digital Circuits Using Structural and Functional Analyses. IEEE Trans. Emerg. Top. Comput. 2 (1) (2014)
Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik
Silicon fault diagnosis using sequence interpolation with backbones. ICCAD (2014)
Adrià Gascón, Pramod Subramanyan, Bruno Dutertre, Ashish Tiwari, Dejan Jovanovic, Sharad Malik
Template-based circuit understanding. FMCAD (2014)
Roderick Bloem, Sharad Malik, Matthias Schlaipfer, Georg Weissenbacher
Reduction of Resolution Refutations and Interpolants via Subsumption. Haifa Verification Conference (2014)
Sunha Ahn, Sharad Malik
Automated firmware testing using firmware-hardware interaction patterns. CODES+ISSS (2014)
Shuyuan Zhang, Sharad Malik
SAT Based Verification of Network Data Planes. ATVA (2013)
Yavuz Yetim, Margaret Martonosi, Sharad Malik
Extracting useful computation from error-prone processors for streaming applications. DATE (2013)
Pramod Subramanyan, Nestan Tsiskaridze, Kanika Pasricha, Dillon Reisman, Adriana Susnea, Sharad Malik
Reverse engineering digital circuits using functional analysis. DATE (2013)
Divjyot Sethi, Muralidhar Talupur, Sharad Malik
Model Checking Unbounded Concurrent Lists. SPIN (2013)
Wenchao Li, Adrià Gascón, Pramod Subramanyan, Wei Yang Tan, Ashish Tiwari, Sharad Malik, Natarajan Shankar, Sanjit A. Seshia
WordRev: Finding word-level structures in a sea of bit-level gates. HOST (2013)
Sunha Ahn, Sharad Malik
Modeling Firmware as Service Functions and Its Application to Test Generation. Haifa Verification Conference (2013)
Divjyot Sethi, Srinivas Narayana, Sharad Malik
Abstractions for model checking SDN controllers. FMCAD (2013)
Arnab Sinha, Sharad Malik, Aarti Gupta
Efficient predictive analysis for detecting nondeterminism in multi-threaded programs. FMCAD (2012)
Daniel Schwartz-Narbonne, Georg Weissenbacher, Sharad Malik
Parallel Assertions for Architectures with Weak Memory Models. ATVA (2012)
Divjyot Sethi, Muralidhar Talupur, Daniel Schwartz-Narbonne, Sharad Malik
Parameterized Model Checking of Fine Grained Concurrency. SPIN (2012)
Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik
Coverage-Based Trace Signal Selection for Fault Localisation in Post-silicon Validation. Haifa Verification Conference (2012)
Georg Weissenbacher, Daniel Kroening, Sharad Malik
Wolverine: Battling Bugs with Interpolants - (Competition Contribution). TACAS (2012)
Shuyuan Zhang, Sharad Malik, Rick McGeer
Verification of Computer Switching Networks: An Overview. ATVA (2012)
Daniel Schwartz-Narbonne, Feng Liu, David I. August, Sharad Malik
passert: A Tool for Debugging Parallel Programs. CAV (2012)
Shuyuan Zhang, Abdulrahman Mahmoud, Sharad Malik, Sanjai Narain
Verification and synthesis of firewalls using SAT and QBF. ICNP (2012)
Carven Chan, Daniel Schwartz-Narbonne, Divjyot Sethi, Sharad Malik
Specification and synthesis of hardware checkpointing and rollback mechanisms. DAC (2012)
Yavuz Yetim, Sharad Malik, Margaret Martonosi
EPROF: An energy/performance/reliability optimization framework for streaming applications. ASP-DAC (2012)
Arnab Sinha, Sharad Malik, Chao Wang, Aarti Gupta
Predictive analysis for detecting serializability violations through Trace Segmentation. MEMOCODE (2011)
Sharad Malik
Runtime Verification: A Computer Architecture Perspective. RV (2011)
Arnab Sinha, Sharad Malik, Chao Wang, Aarti Gupta
Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search. Haifa Verification Conference (2011)
Divjyot Sethi, Yogesh S. Mahajan, Sharad Malik
Specification and encoding of transaction interaction properties. Formal Methods Syst. Des. 39 (2) (2011)
Sanjai Narain, Sharad Malik, Ehab Al-Shaer
Towards Eliminating Configuration Errors in Cyber Infrastructure. SafeConfig (2011)
Charlie Shucheng Zhu, Georg Weissenbacher, Divjyot Sethi, Sharad Malik
SAT-based techniques for determining backbones for post-silicon fault localisation. HLDVT (2011)
Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik
Post-silicon fault localisation using maximum satisfiability and backbones. FMCAD (2011)
Daniel Schwartz-Narbonne, Feng Liu, Tarun Pondicherry, David I. August, Sharad Malik
Parallel assertions for debugging parallel programs. MEMOCODE (2011)
Yogesh S. Mahajan, Sharad Malik
Utility of transaction-level hardware models in refinement checking. HLDVT (2010)
Arnab Sinha, Sharad Malik
Runtime checking of serializability in software transactional memory. IPDPS (2010)
Aarti Gupta, Sharad Malik
Preface. Formal Methods Syst. Des. 35 (1) (2009)
Daniel Schwartz-Narbonne, Carven Chan, Yogesh S. Mahajan, Sharad Malik
Supporting RTL flow compatibility in a microarchitecture-level design framework. CODES+ISSS (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Sharad Malik