Valeria Bertacco

ORCID

Publication Activity (10 Years)

Years Active: 1996-2023
Publications (10 Years): 48

Top Venues

DATE

DAC

IEEE Trans. Computers

ICCAD

Publications

Young Geun Kim, Udit Gupta, Andrew McCrabb, Yonglak Son, Valeria Bertacco, David Brooks, Carole-Jean Wu
GreenScale: Carbon-Aware Systems for Edge Computing. CoRR (2023)
Andrew McCrabb, Aymen Ahmed, Valeria Bertacco
ACRE: Accelerating Random Forests for Explainability. MICRO (2023)
Ian O'Connor, Robert Wille, Andy D. Pimentel, Valeria Bertacco
Postpandemic Conferences: The DATE 2023 Experience. IEEE Des. Test 40 (5) (2023)
Nicholas Wendt, Todd M. Austin, Valeria Bertacco
PriMax: maximizing DSL application performance with selective primitive acceleration. DAC (2022)
Vidushi Goyal, Reetuparna Das, Valeria Bertacco
Hardware-friendly User-specific Machine Learning for Edge Devices. ACM Trans. Embed. Comput. Syst. 21 (5) (2022)
Doowon Lee, Valeria Bertacco
Bypassing Multicore Memory Bugs With Coarse-Grained Reconfigurable Logic. IEEE Trans. Computers 71 (9) (2022)
Andrew McCrabb, Hellina Nigatu, Absalat Getachew, Valeria Bertacco
DyGraph: a dynamic graph generator and benchmark suite. GRADES-NDA@SIGMOD (2022)
Austin Harris, Tarunesh Verma, Shijia Wei, Lauren Biernacki, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari, Todd M. Austin
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware. HOST (2021)
Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das
Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs. FCCM (2021)
Todd M. Austin, Austin Harris, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware. HCS (2021)
Hiwot Tadese Kassa, Tarunesh Verma, Todd M. Austin, Valeria Bertacco
ChipAdvisor: A Machine Learning Approach for Mapping Applications to Heterogeneous Systems. ISQED (2021)
Pete Ehrett, Nathan Block, Bing Schaefer, Adrian Berding, John Paul Koenig, Pranav Srinivasan, Valeria Bertacco, Todd M. Austin
A Defense-Inspired Benchmark Suite. ISPASS (2021)
Vidushi Goyal, Valeria Bertacco, Reetuparna Das
MyML: User-Driven Machine Learning. DAC (2021)
Andrew McCrabb, Valeria Bertacco
Optimizing Vertex Pressure Dynamic Graph Partitioning in Many-Core Systems. IEEE Trans. Computers 70 (6) (2021)
Pete Ehrett, Todd M. Austin, Valeria Bertacco
Chopin: Composing Cost-Effective Custom Chips with Algorithmic Chiplets. ICCD (2021)
Vidushi Goyal, Xiaowei Wang, Valeria Bertacco, Reetuparna Das
Neksus: An Interconnect for Heterogeneous System-In-Package Architectures. IPDPS (2020)
Leul Belayneh, Valeria Bertacco
GraphVine: Exploiting Multicast for Scalable Graph Analytics. DATE (2020)
Abraham Addisie, Valeria Bertacco
Centaur: Hybrid Processing in On/Off-chip Memory Architecture for Graph Analytics. DAC (2020)
Lauren Biernacki, Mark Gallagher, Valeria Bertacco, Todd M. Austin
Thwarting Control Plane Attacks with Displaced and Dilated Address Spaces. HOST (2020)
Abraham Addisie, Valeria Bertacco
Collaborative Accelerators for Streamlining MapReduce on Scale-up Machines With Incremental Data Aggregation. IEEE Trans. Computers 69 (8) (2020)
Vidushi Goyal, Valeria Bertacco, Reetuparna Das
Seesaw: End-to-end Dynamic Sensing for IoT using Machine Learning. DAC (2020)
Leul Belayneh, Abraham Addisie, Valeria Bertacco
MessageFusion: On-path Message Coalescing for Energy Efficient and Scalable Graph Analytics. ISLPED (2019)
Pete Ehrett, Todd M. Austin, Valeria Bertacco
SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design. DATE (2019)
Andrew McCrabb, Eric Winsor, Valeria Bertacco
DREDGE: Dynamic Repartitioning during Dynamic Graph Execution. DAC (2019)
Abraham Addisie, Valeria Bertacco
Collaborative accelerators for in-memory MapReduce on scale-up machines. ASP-DAC (2019)
Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin
Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn. ASPLOS (2019)
Timothy Linscott, Pete Ehrett, Valeria Bertacco, Todd M. Austin
SWAN: mitigating hardware trojans with design ambiguity. ICCAD (2018)
Abraham Addisie, Hiwot Kassa, Opeoluwa Matthews, Valeria Bertacco
Heterogeneous Memory Subsystem for Natural Graph Analytics. IISWC (2018)
Doowon Lee, Opeoluwa Matthews, Valeria Bertacco
Low-Overhead Microarchitectural Patching for Multicore Memory Subsystems. ICCD (2018)
Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari
Vulnerability-tolerant secure architectures. ICCAD (2018)
Alessandro Danese, Valeria Bertacco, Graziano Pravadelli
Symbolic assertion mining for security validation. DATE (2018)
Doowon Lee, Valeria Bertacco
MTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation. ISCA (2017)
Javad Bagherzadeh, Valeria Bertacco
3DFAR: A three-dimensional fabric for reliable multi-core processors. DATE (2017)
Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou, Valeria Bertacco
AGARSoC: Automated test and coverage-model generation for verification of accelerator-rich SoCs. ASP-DAC (2017)
Fitsum Assamnew Andargie, Jonathan Rose, Todd M. Austin, Valeria Bertacco
Energy efficient object detection on the mobile GP-GPU. AFRICON (2017)
Evan Chavis, Harrison Davis, Yijun Hou, Matthew Hicks, Salessawi Ferede Yitbarek, Todd M. Austin, Valeria Bertacco
SNIFFER: A high-accuracy malware detector for enterprise-based systems. IVSW (2017)
Alessandro Danese, Graziano Pravadelli, Valeria Bertacco
DOVE: pinpointing firmware security vulnerabilities via symbolic control flow assertion mining (work-in-progress). CODES+ISSS (2017)
Ofir Weisse, Valeria Bertacco, Todd M. Austin
Regaining Lost Cycles with HotCalls: A Fast Interface for SGX Secure Enclaves. ISCA (2017)
Ritesh Parikh, Valeria Bertacco
Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults. IEEE Trans. Computers 65 (7) (2016)
Rawan Abdel-Khalek, Valeria Bertacco
Correct runtime operation for NoCs through adaptive-region protection. DATE (2016)
Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. DAC (2016)
Biruk Mammo, Milind Furia, Valeria Bertacco, Scott A. Mahlke, Daya Shanker Khudia
BugMD: automatic mismatch diagnosis for bug triaging. ICCAD (2016)
Doowon Lee, Ritesh Parikh, Valeria Bertacco
Highly Fault-tolerant NoC Routing with Application-aware Congestion Management. NOCS (2015)
Biruk Mammo, Ritesh Parikh, Valeria Bertacco
ReDEEM: A heterogeneous distributed microarchitecture for energy-efficient reliability. ISLPED (2015)
Valeria Bertacco
Panel: When will the cost of dependability end innovation in computer design? VTS (2015)
Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco
NoCVision: A Network-on-Chip Dynamic Visualization Solution. NoCArc@MICRO (2015)
Valeria Bertacco, Wade Bonkowski
ItHELPS: Iterative high-accuracy error localization in post-silicon. ICCD (2015)
Biruk W. Mammo, Valeria Bertacco, Andrew DeOrio, Ilya Wagner
Post-Silicon Validation of Multiprocessor Memory Consistency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (6) (2015)
Rawan Abdel-Khalek, Valeria Bertacco
Post-silicon platform for the functional diagnosis and debug of networks-on-chip. ACM Trans. Embed. Comput. Syst. 13 (3s) (2014)
Ritesh Parikh, Valeria Bertacco
ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality. ACM Trans. Embed. Comput. Syst. 13 (3s) (2014)
Ritesh Parikh, Reetuparna Das, Valeria Bertacco
Power-Aware NoCs through Routing and Topology Reconfiguration. DAC (2014)
Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini
At-Speed Distributed Functional Testing to Detect Logic and Delay Faults in NoCs. IEEE Trans. Computers 63 (3) (2014)
Animesh Jain, Ritesh Parikh, Valeria Bertacco
High-radix on-chip networks with low-radix routers. ICCAD (2014)
Doowon Lee, Ritesh Parikh, Valeria Bertacco
Brisk and limited-impact NoC routing reconfiguration. DATE (2014)
Chang-Hong Hsu, Debapriya Chatterjee, Ronny Morad, Raviv Gal, Valeria Bertacco
ArChiVED: Architectural checking via event digests for high performance validation. DATE (2014)
Andrea Pellegrini, Valeria Bertacco
Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (2) (2014)
Rawan Abdel-Khalek, Valeria Bertacco
DiAMOND: Distributed alteration of messages for on-chip network debug. NOCS (2014)
Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. ICCAD (2013)
Andrew DeOrio, Qingkun Li, Matthew Burgess, Valeria Bertacco
Machine learning-based anomaly detection for post-silicon bug diagnosis. DATE (2013)
Andrea Pellegrini, Valeria Bertacco
Cobra: A comprehensive bundle-based reliable architecture. ICSAMOS (2013)
William Arthur, Biruk Mammo, Ricardo Rodríguez Jorge, Todd M. Austin, Valeria Bertacco
Schnauzer: scalable profiling for likely security bug sites. CGO (2013)
Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, Anirudh M. Kaushik, Hiren D. Patel
On the use of GP-GPUs for accelerating compute-intensive EDA applications. DATE (2013)
Ritesh Parikh, Valeria Bertacco
uDIREC: unified diagnosis and reconfiguration for frugal bypass of NoC faults. MICRO (2013)
Biruk Mammo, Jim Larimer, Matthew Morgan, Dave Fan, Eric Hennenhoefer, Valeria Bertacco
Architectural Trace-Based Functional Coverage for Multiprocessor Verification. MTV (2012)
Andrew DeOrio, Jialin Li, Valeria Bertacco
Bridging pre- and post-silicon debugging with BiPeD. ICCAD (2012)
Rawan Abdel-Khalek, Valeria Bertacco
Functional post-silicon diagnosis and debug for networks-on-chip. ICCAD (2012)
Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco
Checking architectural outputs instruction-by-instruction on acceleration platforms. DAC (2012)
Nicola Bombieri, Sara Vinco, Valeria Bertacco, Debapriya Chatterjee
SystemC simulation on GP-GPUs: CUDA vs. OpenCL. CODES+ISSS (2012)
Valeria Bertacco
Humans for EDA and EDA for humans. DAC (2012)
Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco
Approximating checkers for simulation acceleration. DATE (2012)
Andrea Pellegrini, Joseph L. Greathouse, Valeria Bertacco
Viper: Virtual pipelines for enhanced reliability. ISCA (2012)
Andrew DeOrio, David Fick, Valeria Bertacco, Dennis Sylvester, David T. Blaauw, Jin Hu, Gregory K. Chen
A Reliable Routing Architecture and Algorithm for NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (5) (2012)
Amirali Ghofrani, Ritesh Parikh, Saeed Shamshiri, Andrew DeOrio, Kwang-Ting Cheng, Valeria Bertacco
Comprehensive online defect diagnosis in on-chip networks. VTS (2012)
Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco
CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions. DATE (2012)
Sara Vinco, Debapriya Chatterjee, Valeria Bertacco, Franco Fummi
SAGA: SystemC acceleration on GPU architectures. DAC (2012)
Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco
Gate-Level Simulation with GPU Computing. ACM Trans. Design Autom. Electr. Syst. 16 (3) (2011)
Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco
Simulation-based signal selection for state restoration in silicon debug. ICCAD (2011)
Ritesh Parikh, Valeria Bertacco
Formally enhanced runtime verification to ensure NoC functional correctness. MICRO (2011)
Andrea Pellegrini, Valeria Bertacco
Cardio: Adaptive CMPs for reliability through dynamic introspective operation. HLDVT (2011)
Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini
A distributed and topology-agnostic approach for on-line NoC testing. NOCS (2011)
Konstantinos Aisopos, Andrew DeOrio, Li-Shiuan Peh, Valeria Bertacco
ARIADNE: Agnostic Reconfiguration in a Disconnected Network Environment. PACT (2011)
Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini
ReliNoC: A reliable network for priority-based on-chip communication. DATE (2011)
Andrew DeOrio, Daya Shanker Khudia, Valeria Bertacco
Post-silicon bug diagnosis with inconsistent executions. ICCAD (2011)
Joseph L. Greathouse, Chelsea LeBlanc, Todd M. Austin, Valeria Bertacco
Highly scalable distributed dataflow analysis. CGO (2011)
Andrew DeOrio, Konstantinos Aisopos, Valeria Bertacco, Li-Shiuan Peh
DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips. DAC (2011)
Rawan Abdel-Khalek, Ritesh Parikh, Andrew DeOrio, Valeria Bertacco
Functional correctness for CMP interconnects. ICCD (2011)
Valeria Bertacco
Post-silicon debugging for multi-core designs. ASP-DAC (2010)
Rawan Abdel-Khalek, Valeria Bertacco
SoCGuard: A runtime verification solution for the functional correctness of SoCs. VLSI-SoC (2010)
Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor
Bridging pre-silicon verification and post-silicon validation. DAC (2010)
Andrea Pellegrini, Valeria Bertacco
Application-Aware diagnosis of runtime hardware faults. ICCAD (2010)
Andrea Pellegrini, Valeria Bertacco, Todd M. Austin
Fault-based attack of RSA authentication. DATE (2010)
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov, Alan Mishchenko
Logic synthesis and circuit customization using extensive external don't-cares. ACM Trans. Design Autom. Electr. Syst. 15 (3) (2010)
Debapriya Chatterjee, Valeria Bertacco
EQUIPE: Parallel equivalence checking with GP-GPUs. ICCD (2010)
Valeria Bertacco
Verification Failures: What to Do When Things Go Wrong. Haifa Verification Conference (2010)
Andrew DeOrio, Valeria Bertacco
Electronic design automation for social networks. DAC (2010)
Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco
Event-driven gate-level simulation with GP-GPUs. DAC (2009)
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
Customizing IP cores for system-on-chip designs using extensive external don't-cares. DATE (2009)
Bernd Becker, Valeria Bertacco, Rolf Drechsler, Masahiro Fujita
09461 Abstracts Collection - Algorithms and Applications for Next Generation SAT Solvers. Algorithms and Applications for Next Generation SAT Solvers (2009)
J. Hao, Valeria Bertacco
PowerRanger: Assessing circuit vulnerability to power attacks using SAT-based static analysis. HLDVT (2009)
Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco
A Flexible Software-Based Framework for Online Detection of Hardware Defects. IEEE Trans. Computers 58 (8) (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Valeria Bertacco