Hiren D. Patel

ORCID

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 37

Top Venues

RTAS

CoRR

ACM Trans. Embed. Comput. Syst.

DATE

Virginia Tech, Blacksburg, VA, USA (PHD)

Education History

Virginia Tech, Blacksburg, VA, USA

PHD

Publications

Xinzhe Wang, Zhuanhao Wu, Rodolfo Pellizzoni, Hiren D. Patel
Exclusive Hierarchies for Predictable Sharing in Last-Level Cache. RTAS (2024)
Francesco Lumpp, Franco Fummi, Hiren D. Patel, Nicola Bombieri
Enabling Kubernetes Orchestration of Mixed-Criticality Software for Autonomous Mobile Robots. IEEE Trans. Robotics 40 (2024)
Artem Klashtorny, Mahesh Tripunitara, Hiren D. Patel
A Compiler Phase to Optimally Split GPU Wavefronts for Safety-Critical Systems. DATE (2024)
Artem Klashtorny, Zhuanhao Wu, Anirudh Mohan Kaushik, Hiren D. Patel
Predictable GPU Wavefront Splitting for Safety-Critical Systems. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev
Enhancing Strong PUF Security With Nonmonotonic Response Quantization. IEEE Trans. Very Large Scale Integr. Syst. 31 (1) (2023)
Zhuanhao Wu, Anirudh M. Kaushik, Hiren D. Patel
ZeroCost-LLC: Shared LLCs at No Cost to WCL. RTAS (2023)
Susmita Tadepalli, Zhuanhao Wu, Hiren D. Patel
PASoC: A Predictable Accelerator-rich SoC. CPS-IoT Week Workshops (2023)
Zhuanhao Wu, Maya B. Gokhale, Scott Lloyd, Hiren D. Patel
SCCL: An open-source SystemC to RTL translator. FCCM (2023)
Anirudh Mohan Kaushik, Hiren D. Patel
Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Zhuanhao Wu, Hiren D. Patel
Predictable Sharing of Last-level Cache Partitions for Multi-core Safety-critical Systems. CoRR (2022)
Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev
Enhancing Strong PUF Security with Non-monotonic Response Quantization. CoRR (2022)
Michael Barrow, Zhuanhao Wu, Scott Lloyd, Maya B. Gokhale, Hiren D. Patel, Peter Lindstrom
ZHW: A Numerical CODEC for Big Data Scientific Computation. FPT (2022)
Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev
Design Exploration and Security Assessment of PUF-on-PUF Implementations. CoRR (2022)
Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev
Secure and Lightweight Strong PUF Challenge Obfuscation with Keyed Non-linear FSR. CoRR (2022)
Francesco Lumpp, Franco Fummi, Hiren D. Patel, Nicola Bombieri
Containerization and Orchestration of Software for Autonomous Mobile Robots: a Case Study of Mixed-Criticality Tasks across Edge-Cloud Computing Platforms. IROS (2022)
Zhuanhao Wu, Hiren D. Patel
Predictable sharing of last-level cache partitions for multi-core safety-critical systems. DAC (2022)
Francesco Lumpp, Hiren D. Patel, Nicola Bombieri
A Framework for Optimizing CPU-iGPU Communication on Embedded Platforms. DAC (2021)
Anirudh Mohan Kaushik, Hiren D. Patel
A Systematic Approach to Achieving Tight Worst-Case Latency and High-Performance Under Predictable Cache Coherence. RTAS (2021)
Zhuanhao Wu, Anirudh Mohan Kaushik, Paulos Tegegn, Hiren D. Patel
A Hardware Platform for Exploring Predictable Cache Coherence Protocols for Real-time Multicores. RTAS (2021)
Anirudh Mohan Kaushik, Gennady Pekhimenko, Hiren D. Patel
Gretch: A Hardware Prefetcher for Graph Analytics. ACM Trans. Archit. Code Optim. 18 (2) (2021)
Francesco Lumpp, Stefano Aldegheri, Hiren D. Patel, Nicola Bombieri
Task Mapping and Scheduling for OpenVX Applications on Heterogeneous Multi/Many-Core Architectures. IEEE Trans. Computers 70 (8) (2021)
Anirudh Mohan Kaushik, Mohamed Hassan, Hiren D. Patel
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems. IEEE Trans. Computers 70 (12) (2021)
Anirudh Mohan Kaushik, Hiren D. Patel
Automated Synthesis of Predictable and High-Performance Cache Coherence Protocols. DATE (2021)
Stefano Aldegheri, Nicola Bombieri, Hiren D. Patel
On the Task Mapping and Scheduling for DAG-based Embedded Vision Applications on Heterogeneous Multi/Many-core Architectures. DATE (2020)
Anirudh M. Kaushik, Paulos Tegegn, Zhuanhao Wu, Hiren D. Patel
CARP: A Data Communication Mechanism for Multi-core Mixed-Criticality Systems. RTSS (2019)
Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev, Mahesh V. Tripunitara
Strengthening PUFs using Composition. ICCAD (2019)
Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan, Hiren D. Patel
Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems. RTSS (2019)
Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis. ACM Trans. Embed. Comput. Syst. 17 (5) (2018)
Mohamed Hassan, Hiren D. Patel
MCXplore: Automating the Validation Process of DRAM Memory Controller Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (5) (2018)
Danlu Guo, Mohamed Hassan, Rodolfo Pellizzoni, Hiren D. Patel
A Comparative Study of Predictable DRAM Controllers. ACM Trans. Embed. Comput. Syst. 17 (2) (2018)
Mohamed Hassan, Hiren D. Patel, Rodolfo Pellizzoni
PMC: A Requirement-Aware DRAM Controller for Multicore Mixed Criticality Systems. ACM Trans. Embed. Comput. Syst. 16 (4) (2017)
Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel
Predictable Cache Coherence for Multi-core Real-Time Systems. RTAS (2017)
Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan, Hiren D. Patel
HourGlass: Predictable Time-based Cache Coherence Protocol for Dual-Critical Multi-Core Systems. CoRR (2017)
Hany Kashif, Hiren D. Patel
Buffer Space Allocation for Real-Time Priority-Aware Networks. RTAS (2016)
Mohamed Hassan, Hiren D. Patel
Criticality- and Requirement-Aware Bus Arbitration for Multi-Core Mixed Criticality Systems. RTAS (2016)
Hany Kashif, Hiren D. Patel, Sebastian Fischmeister
Path Selection for Real-Time Communication on Priority-Aware NoCs. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Mohamed Hassan, Hiren D. Patel
MCXplore: An automated framework for validating memory controller designs. DATE (2016)
Mohamed Hassan, Hiren D. Patel, Rodolfo Pellizzoni
A framework for scheduling DRAM memory accesses for multi-core mixed-time critical systems. RTAS (2015)
Hany Kashif, Sina Gholamian, Hiren D. Patel
SLA: A Stage-Level Latency Analysisfor Real-Time Communicationin a Pipelined Resource Model. IEEE Trans. Computers 64 (4) (2015)
Hany Kashif, Johnson J. Thomas, Hiren D. Patel, Sebastian Fischmeister
Static slack-based instrumentation of programs. ETFA (2015)
Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel
Reverse-engineering embedded memory controllers through latency-based analysis. RTAS (2015)
S. Visweswaran, Hiren D. Patel
A graph associated with the set of all nonzero annihilating ideals of a commutative ring. Discret. Math. Algorithms Appl. 6 (4) (2014)
Dan Wang, Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg
Reliable Computing with Ultra-Reduced Instruction Set Coprocessors. IEEE Micro 34 (6) (2014)
Hany Kashif, Hiren D. Patel
Bounding buffer space requirements for real-time priority-aware networks. ASP-DAC (2014)
Stephen A. Edwards, Hiren D. Patel
MEMOCODE 2014 software design contest: Space Invaders emulator. MEMOCODE (2014)
Aayush Prakash, Hiren D. Patel
An Instruction Scratchpad Memory Allocation for the Precision Timed Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Anirudh M. Kaushik, Hiren D. Patel
Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC models. FDL (2013)
Hany Kashif, Sina Gholamian, Rodolfo Pellizzoni, Hiren D. Patel, Sebastian Fischmeister
ORTAP: An Offset-based response time analysis for a pipelined communication resource model. IEEE Real-Time and Embedded Technology and Applications Symposium (2013)
Sundaram Ananthanarayanan, Siddharth Garg, Hiren D. Patel
Low cost permanent fault detection using ultra-reduced instruction set co-processors. DATE (2013)
Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, Anirudh M. Kaushik, Hiren D. Patel
On the use of GP-GPUs for accelerating compute-intensive EDA applications. DATE (2013)
Mahesh Nanjundappa, Anirudh M. Kaushik, Hiren D. Patel, Sandeep K. Shukla
Accelerating SystemC simulations using GPUs. HLDVT (2012)
Rohit Sinha, Hiren D. Patel
synASM: A High-Level Synthesis Framework With Support for Parallel and Timed Constructs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (10) (2012)
Rohit Sinha, Aayush Prakash, Hiren D. Patel
Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs. ASP-DAC (2012)
Aayush Prakash, Hiren D. Patel
An instruction scratchpad memory allocation for the precision timed architecture. DATE (2012)
Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg
Reliable computing with ultra-reduced instruction set co-processors. DAC (2012)
Hany Kashif, Hiren D. Patel, Sebastian Fischmeister
Using link-level latency analysis for path selection for real-time communication on NoCs. ASP-DAC (2012)
Sitaram Chamarty, Hiren D. Patel, Mahesh V. Tripunitara
An authorization scheme for version control systems. SACMAT (2011)
Rohit Sinha, Hiren D. Patel
Abstract state machines as an intermediate representation for high-level synthesis. DATE (2011)
Rohit Sinha, Hiren D. Patel
Extending Force-Directed Scheduling with Explicit Parallel and Timed Constructs for High-Level Synthesis. FCCM (2011)
Dai N. Bui, Edward A. Lee, Isaac Liu, Hiren D. Patel, Jan Reineke
Temporal isolation on multiprocessing architectures. DAC (2011)
Jan Reineke, Isaac Liu, Hiren D. Patel, Sungjun Kim, Edward A. Lee
PRET DRAM controller: bank privatization for predictability and temporal isolation. CODES+ISSS (2011)
Siddharth Garg, Shreyas Sundaram, Hiren D. Patel
Robust heterogeneous data center design: a principled approach. SIGMETRICS Perform. Evaluation Rev. 39 (3) (2011)
Mahesh Nanjundappa, Hiren D. Patel, Bijoy Antony Jose, Sandeep K. Shukla
SCGPSim: a fast SystemC simulator on GPUs. ASP-DAC (2010)
Nathan Buchanan, Hiren D. Patel
Towards a Multi-MoC Hardware/Software Co-design Framework Using Abstract State Machines. MTV (2010)
Dai N. Bui, Hiren D. Patel, Edward A. Lee
Deploying Hard Real-Time Control Software on Chip-Multiprocessors. RTCSA (2010)
Bijoy Antony Jose, Hiren D. Patel, Sandeep K. Shukla, Jean-Pierre Talpin
Generating Multi-Threaded code from Polychronous Specifications. Electron. Notes Theor. Comput. Sci. 238 (1) (2009)
Stephen A. Edwards, Sungjun Kim, Edward A. Lee, Isaac Liu, Hiren D. Patel, Martin Schoeberl
A disruptive computer design idea: Architectures with repeatable timing. ICCD (2009)
Hiren D. Patel, Sandeep K. Shukla
On Cosimulating Multiple Abstraction-Level System-Level Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (2) (2008)
Bijoy Antony Jose, Sandeep K. Shukla, Hiren D. Patel, Jean-Pierre Talpin
On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications. MEMOCODE (2008)
Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee, Hugo A. Andrade
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture. DS-RT (2008)
Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer
Exploring power management in multi-core systems. ASP-DAC (2008)
Hiren D. Patel, Sandeep K. Shukla
Model-Driven Validation of SystemC Designs. EURASIP J. Embed. Syst. 2008 (2008)
Ben Lickly, Isaac Liu, Sungjun Kim, Hiren D. Patel, Stephen A. Edwards, Edward A. Lee
Predictable programming on a precision timed architecture. CASES (2008)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Des. Autom. Embed. Syst. 12 (1-2) (2008)
Hiren D. Patel, Sandeep K. Shukla
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL. DATE (2007)
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han
Performance modeling for early analysis of multi-core systems. CODES+ISSS (2007)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12 (3) (2007)
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi
Heterogeneous Behavioral Hierarchy Extensions for SystemC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (4) (2007)
Hiren D. Patel, Sandeep K. Shukla
Model-driven Validation of SystemC Designs. DAC (2007)
Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
CARH: service-oriented architecture for validating system-level designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (8) (2006)
Hiren D. Patel, Sandeep K. Shukla
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. MTV (2006)
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi
Heterogeneous behavioral hierarchy for system level designs. DATE (2006)
Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil
A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design. MEMOCODE (2006)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
Modelling Environment for Heterogeneous Systems based on MoCs. FDL (2005)
Hiren D. Patel, Sandeep K. Shukla
Towards Behavioural Hierarchy Extensions for SystemC. FDL (2005)
Hiren D. Patel, Sandeep K. Shukla
Towards a heterogeneous simulation kernel for system-level models: a SystemC kernel for synchronous data flow models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (8) (2005)
David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla
SystemCXML: An Exstensible SystemC Front end Using XML. FDL (2005)
David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla
Automated Extraction of Structural Information from SystemC-based IP for Validation. MTV (2005)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla
A Functional Programming Framework of Heterogeneous Model of Computation for System Design. FDL (2004)
Hiren D. Patel, Sandeep K. Shukla
Towards a Heterogeneous Simulation Kernel for System Level Models: A SystemC Kernel for Synchronous Data Flow Models. ISVLSI (2004)
Hiren D. Patel, Sandeep K. Shukla
Towards a heterogeneous simulation kernel for system level models: a SystemC kernel for synchronous data flow models. ACM Great Lakes Symposium on VLSI (2004)

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Publication Activity (10 Years)

Top Topics

Top Venues

Hiren D. Patel