Deepak Mathaikutty

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 7

Top Venues

CoRR

IEEE Micro

ISSCC

VLSI Technology and Circuits

Virginia Tech, Blacksburg, VA, USA (PHD)

Education History

Virginia Tech, Blacksburg, VA, USA

PHD

Publications

Charles Qi, Yi Wang, Hui Wang, Yang Lu, Shiva Shankar Subramanian, Finola Cahill, Conall Tuohy, Victor Li, Xu Qian, Darren Crews, Ling Wang, Shivaji Roy, Andrea Deidda, Martin Power, Niall Hanrahan, Rick Richmond, Umer Cheema, Arnab Raha, Alessandro Palla, Gary Baugh, Deepak Mathaikutty
VPU-EM: An Event-based Modeling Framework to Evaluate NPU Performance and Power Efficiency at Scale. CoRR (2023)
Ming Lei, Mahib Rahman, Deepak Mathaikutty, Ignacio Alvarez
Wireless-Assisted Automatic Online Spatial Calibration based on 5G TSN for Sensor Fusion. ICSPCC (2023)
Steven Hsu, Amit Agarwal, Mark A. Anders, Arnab Raha, Raymond Sung, Deepak Mathaikutty, Ram Krishnamurthy, James W. Tschanz, Vivek De
2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators. VLSI Technology and Circuits (2022)
Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya
Design Considerations for Edge Neural Network Accelerators: An Industry Perspective. VLSI Design (2021)
Pascal Andreas Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Xiang Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De
An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization. IEEE J. Solid State Circuits 54 (1) (2019)
Mike Davies, Narayan Srinivasa, Tsung-Han Lin, Gautham N. Chinya, Yongqiang Cao, Sri Harsha Choday, Georgios D. Dimou, Prasad Joshi, Nabil Imam, Shweta Jain, Yuyun Liao, Chit-Kwan Lin, Andrew Lines, Ruokun Liu, Deepak Mathaikutty, Steven McCoy, Arnab Paul, Jonathan Tse, Guruguhanathan Venkataramanan, Yi-Hsin Weng, Andreas Wild, Yoonseok Yang, Hong Wang
Loihi: A Neuromorphic Manycore Processor with On-Chip Learning. IEEE Micro 38 (1) (2018)
Pascal Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Chris Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS. ISSCC (2018)
Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla
: Statistical Regression Based Power Models for Co-Processors Power Estimation. J. Low Power Electron. 5 (4) (2009)
Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar
Power estimation methodology for a high-level synthesis framework. ISQED (2009)
Alberto L. Sangiovanni-Vincentelli, Sandeep K. Shukla, Janos Sztipanovits, Guang Yang, Deepak Mathaikutty
Metamodeling: An Emerging Representation Paradigm for System-Level Design. IEEE Des. Test Comput. 26 (3) (2009)
Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla
Accurate power estimation of hardware co-processors using system level simulation. SoCC (2009)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla
A Trace-Based Framework for Verifiable GALS Composition of IPs. IEEE Trans. Very Large Scale Integr. Syst. 16 (9) (2008)
Deepak Mathaikutty, Sandeep K. Shukla
MCF: A Metamodeling-Based Component Composition Framework - Composing SystemC IPs for Executable System Models. IEEE Trans. Very Large Scale Integr. Syst. 16 (7) (2008)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla
Dataflow Architectures for GALS. Electron. Notes Theor. Comput. Sci. 200 (1) (2008)
Deepak Mathaikutty, Sandeep K. Shukla
Mining metadata for composability of IPs from SystemC IP library. Des. Autom. Embed. Syst. 12 (1-2) (2008)
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
MMV: A Metamodeling Based Microprocessor Validation Environment. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Syed Suhaib, Bijoy Antony Jose, Sandeep K. Shukla, Deepak Mathaikutty
Formal Transformation of a KPN Specification to a GALS Implementation. FDL (2008)
Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla
Applying Verification Collaterals for Accurate Power Estimation. MTV (2008)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Des. Autom. Embed. Syst. 12 (1-2) (2008)
Deepak Mathaikutty, Sandeep K. Shukla
Type Inference for IP Composition. MEMOCODE (2007)
Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar
Assertion-Based Modal Power Estimation. MTV (2007)
Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla
Model-driven test generation for system level validation. HLDVT (2007)
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
Model Based Test Generation for Microprocessor Architecture Validation. VLSI Design (2007)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12 (3) (2007)
Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla
A Metamodeling based Framework for Architectural Modeling and Simulator Generation. FDL (2007)
Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
Design fault directed test generation for microprocessor validation. DATE (2007)
Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
Validating Families of Latency Insensitive Protocols. IEEE Trans. Computers 55 (11) (2006)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla
A Trace Based Framework for Validation of SoC Designs with GALS Systems. SoCC (2006)
Deepak Mathaikutty, Sandeep K. Shukla
Mining Metadata for Composability of IPs from SystemC IP Library. FDL (2006)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin
A Functional Programming Framework for Latency Insensitive Protocol Validation. Electron. Notes Theor. Comput. Sci. 146 (2) (2006)
Deepak Mathaikutty, Sandeep K. Shukla
MCF: A Metamodeling-based Visual Component Composition Framework. FDL (2006)
Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
CARH: service-oriented architecture for validating system-level designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (8) (2006)
Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja
MMV: Metamodeling Based Microprocessor Valiation Environment. HLDVT (2006)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, Jean-Pierre Talpin
Polychronous Methodology For System Design: A True Concurrency Approach. HLDVT (2006)
Deepak Mathaikutty, Sandeep K. Shukla
SoC Design Space Exploration through Automated IP Selection from SystemC IP Library. SoCC (2006)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
Modelling Environment for Heterogeneous Systems based on MoCs. FDL (2005)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla
System Level Design Methodology for System On Chips using Multi-Threaded Graphs. SoCC (2005)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner
XFM: An incremental methodology for developing formal models. ACM Trans. Design Autom. Electr. Syst. 10 (4) (2005)
David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla
SystemCXML: An Exstensible SystemC Front end Using XML. FDL (2005)
David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla
Automated Extraction of Structural Information from SystemC-based IP for Validation. MTV (2005)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner
Validating families of latency insensitive protocols. HLDVT (2005)
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla
A Functional Programming Framework of Heterogeneous Model of Computation for System Design. FDL (2004)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla
Effects of property ordering in an incremental formal modeling methodology. HLDVT (2004)
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner
Extreme Formal Modeling (XFM) for Hardware Models. MTV (2004)

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Publication Activity (10 Years)

Top Topics

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Deepak Mathaikutty