Sri Harsha Choday

Publication Activity (10 Years)

Years Active: 2013-2018
Publications (10 Years): 2

Top Topics

Design Considerations

Failure Detection

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Mike Davies, Narayan Srinivasa, Tsung-Han Lin, Gautham N. Chinya, Yongqiang Cao, Sri Harsha Choday, Georgios D. Dimou, Prasad Joshi, Nabil Imam, Shweta Jain, Yuyun Liao, Chit-Kwan Lin, Andrew Lines, Ruokun Liu, Deepak Mathaikutty, Steven McCoy, Arnab Paul, Jonathan Tse, Guruguhanathan Venkataramanan, Yi-Hsin Weng, Andreas Wild, Yoonseok Yang, Hong Wang
Loihi: A Neuromorphic Manycore Processor with On-Chip Learning. IEEE Micro 38 (1) (2018)
Xuanyao Fong, Yusung Kim, Rangharajan Venkatesan, Sri Harsha Choday, Anand Raghunathan, Kaushik Roy
Spin-Transfer Torque Memories: Devices, Circuits, and Systems. Proc. IEEE 104 (7) (2016)
Xuanyao Fong, Yusung Kim, Sri Harsha Choday, Kaushik Roy
Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells. IEEE Trans. Very Large Scale Integr. Syst. 22 (2) (2014)
Sri Harsha Choday, Kon-Woo Kwon, Kaushik Roy
Workload dependent evaluation of thin-film thermoelectric devices for on-chip cooling and energy harvesting. ICCAD (2014)
Abhronil Sengupta, Sri Harsha Choday, Yusung Kim, Kaushik Roy
Spin Orbit Torque Based Electronic Neuron. CoRR (2014)
Kon-Woo Kwon, Sri Harsha Choday, Yusung Kim, Kaushik Roy
AWARE (Asymmetric Write Architecture With REdundant Blocks): A High Write Speed STT-MRAM Cache Architecture. IEEE Trans. Very Large Scale Integr. Syst. 22 (4) (2014)
Niladri Narayan Mojumder, Xuanyao Fong, Charles Augustine, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy
Dual pillar spin-transfer torque MRAMs for low power applications. ACM J. Emerg. Technol. Comput. Syst. 9 (2) (2013)