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AWARE (Asymmetric Write Architecture With REdundant Blocks): A High Write Speed STT-MRAM Cache Architecture.

Kon-Woo KwonSri Harsha ChodayYusung KimKaushik Roy
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2014)
Keyphrases
  • design considerations
  • management system
  • real time
  • wide range
  • query processing
  • website
  • high speed
  • software architecture