Debabrata Mohapatra

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 4

Top Topics

Special Session

Benchmark Suite

Statistical Methods

Machine Learning Methods

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo, Jason Yik, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby R. Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse. MLSys (2023)
Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo, Jason Yik, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby R. Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse. CoRR (2022)
Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya
Design Considerations for Edge Neural Network Accelerators: An Industry Perspective. VLSI Design (2021)
Arnab Raha, Soumendu Kumar Ghosh, Debabrata Mohapatra, Deepak A. Mathaikutty, Raymond Sung, Cormac Brick, Vijay Raghunathan
Special Session: Approximate TinyML Systems: Full System Approximations for Extreme Energy-Efficiency in Intelligent Edge Devices. ICCD (2021)
Vinay Kumar Chippa, Debabrata Mohapatra, Kaushik Roy, Srimat T. Chakradhar, Anand Raghunathan
Scalable Effort Hardware Design. IEEE Trans. Very Large Scale Integr. Syst. 22 (9) (2014)
Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim
How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. CICC (2013)
Vaibhav Gupta, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy
Low-Power Digital Signal Processing Using Approximate Adders. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (1) (2013)
Vinay K. Chippa, Hrishikesh Jayakumar, Debabrata Mohapatra, Kaushik Roy, Anand Raghunathan
Energy-efficient recognition and mining processor using scalable effort design. CICC (2013)
Mayur Agrawal, Debabrata Mohapatra, Ilya Pollak
Empirical Evidence Against CAPM: Relating Alphas and Returns to Betas. IEEE J. Sel. Top. Signal Process. 6 (4) (2012)
Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy
Logic and Memory Design Based on Unequal Error Protection for Voltage-scalable, Robust and Adaptive DSP Systems. J. Signal Process. Syst. 68 (3) (2012)
Debabrata Mohapatra, Vinay K. Chippa, Anand Raghunathan, Kaushik Roy
Design of voltage-scalable meta-functions for approximate computing. DATE (2011)
Mayur Agrawal, Debabrata Mohapatra, Ilya Pollak
Empirical evidence against CAPM: Relating alphas and returns to betas. ICASSP (2011)
Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy
A Priority-Based 6T/8T Hybrid SRAM Architecture for Aggressive Voltage Scaling in Video Applications. IEEE Trans. Circuits Syst. Video Technol. 21 (2) (2011)
Chih-Hsiang Ho, Chao Lu, Debabrata Mohapatra, Kaushik Roy
Variation-tolerant and self-repair design methodology for low temperature polycrystalline silicon liquid crystal and organic light emitting diode displays. ASP-DAC (2011)
Vaibhav Gupta, Debabrata Mohapatra, Sang Phill Park, Anand Raghunathan, Kaushik Roy
IMPACT: imprecise adders for low-power approximate computing. ISLPED (2011)
Swaroop Ghosh, Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy
Voltage Scalable High-Speed Robust Hybrid Arithmetic Units Using Adaptive Clocking. IEEE Trans. Very Large Scale Integr. Syst. 18 (9) (2010)
Vaibhav Gupta, Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy
VEDA: Variation-aware energy-efficient Discrete Wavelet Transform architecture. ICCD (2010)
Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency. DAC (2010)
Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors. DAC (2009)
Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy
System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning. SiPS (2009)
Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy
Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator. ISLPED (2009)
Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy
Low-power process-variation tolerant arithmetic units using input-based elastic clocking. ISLPED (2007)