Sung Kyu Lim

ORCID

Publication Activity (10 Years)

Years Active: 1997-2023
Publications (10 Years): 149

Top Venues

ICCAD

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

DAC

ISLPED

Publications

Gauthaman Murali, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31 (10) (2023)
Shao-Chun Hung, Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty
Transferable Graph Neural Network-Based Delay-Fault Localization for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Yi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim
RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning. DAC (2023)
Jeffrey S. Vetter, Prasanna Date, Farah Fahim, Shruti R. Kulkarni, Petro Maksymovych, A. Alec Talin, Marc González Tallada, Pruek Vanna-Iampikul, Aaron R. Young, David Brooks, Yu Cao, Gu-Yeon Wei, Sung Kyu Lim, Frank Liu, Matthew J. Marinella, Bobby G. Sumpter, Narasinga Rao Miniskar
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials. Int. J. High Perform. Comput. Appl. 37 (3-4) (2023)
Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation. ACM Trans. Design Autom. Electr. Syst. 28 (4) (2023)
Gauthaman Murali, Aditya Iyer, Navneeth Ravichandran, Sung Kyu Lim
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3D DNN Accelerators. ICCAD (2023)
Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max Shulaker, Sung Kyu Lim, Subhasish Mitra
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits. DATE (2023)
Narasinga Rao Miniskar, Pruek Vanna-Iampikul, Aaron R. Young, Sung Kyu Lim, Frank Liu, Jieun Yoo, Corrinne Mills, Nhan Tran, Farah Fahim, Jeffrey S. Vetter
A 3D Implementation of Convolutional Neural Network for Fast Inference. ISCAS (2023)
Sandra Maria Shaji, Lingjun Zhu, Jun-Sik Yoon, Sung Kyu Lim
A Comparative Study on Front-Side, Buried and Back-Side Power Rail Topologies in 3nm Technology Node. ISLPED (2023)
Lingjun Zhu, Sung Kyu Lim
INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps. DAC (2023)
Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning. ISPD (2023)
Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty
Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31 (3) (2023)
Gauthaman Murali, Anthony Agnesina, Sung Kyu Lim
A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim
Parameter Optimization of VLSI Placement Through Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Pruek Vanna-Iampikul, Yi-Chen Lu, Da Eun Shim, Sung Kyu Lim
GNN-based Multi-bit Flip-flop Clustering and Post-clustering Design Optimization for Energy-efficient 3D ICs. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim
On Legalization of Die Bonding Bumps and Pads for 3D ICs. ISPD (2023)
Pruek Vanna-Iampikul, Lingjun Zhu, Serhat Erdogan, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Sung Kyu Lim
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits. DAC (2023)
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (7) (2023)
Sai Pentapati, Sung Kyu Lim
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs. ISPD (2022)
Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim
A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (9) (2022)
Yandong Luo, Sourav Dutta, Ankit Kaul, Sung Kyu Lim, Muhannad S. Bakir, Suman Datta, Shimeng Yu
A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Yi-Chen Lu, Sung Kyu Lim
On Advancing Physical Design Using Graph Neural Networks. ICCAD (2022)
Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren
Placement Optimization via PPA-Directed Graph Clustering. MLCAD (2022)
Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (3) (2022)
Edward Lee, Daehyun Kim, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay
A ReRAM Memory Compiler for Monolithic 3D Integrated Circuits in a Carbon Nanotube Process. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Bon Woong Ku, Catherine D. Schuman, Md Musabbir Adnan, Tiffany M. Mintz, Raphael C. Pooser, Kathleen E. Hamilton, Garrett S. Rose, Sung Kyu Lim
Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Sai Pentapati, Sung Kyu Lim
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs. IEEE Trans. Very Large Scale Integr. Syst. 30 (9) (2022)
Lingjun Zhu, Nesara Eranna Bethur, Yi-Chen Lu, Youngsang Cho, Yunhyeok Im, Sung Kyu Lim
3D IC Tier Partitioning of Memory Macros: PPA vs. Thermal Tradeoffs. ISLPED (2022)
Yi-Chen Lu, Wei-Ting Chan, Vishal Khandelwal, Sung Kyu Lim
Driving Early Physical Synthesis Exploration through End-of-Flow Total Power Prediction. MLCAD (2022)
Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim
Design Automation and Test Solutions for Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. DATE (2022)
Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim
Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISLPED (2022)
Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. ISPD (2022)
Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty
Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 29 (11) (2021)
Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim
Doomed Run Prediction in Physical Design by Exploiting Sequential Flow and Graph Learning. ICCAD (2021)
Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali, Mark Nelson, Sung Kyu Lim, Krishnendu Chakrabarty
ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs. ICCAD (2021)
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. ISQED (2021)
Sai Surya Kiran Pentapati, Bon Woong Ku, Sung Kyu Lim
ML-Based Wire RC Prediction in Monolithic 3D ICs with an Application to Full-Chip Optimization. ISPD (2021)
Sai Surya Kiran Pentapati, Sung Kyu Lim
Heterogeneous Monolithic 3D ICs: EDA Solutions, and Power, Performance, Cost Tradeoffs. DAC (2021)
Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim
FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction. HPCA (2021)
Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim
Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. DAC (2021)
Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks. ISPD (2021)
Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM. IEEE Trans. Very Large Scale Integr. Syst. 29 (2) (2021)
Lingjun Zhu, Sung Kyu Lim
Physical Design Challenges and Solutions for Emerging Heterogeneous 3D Integration Technologies. ISPD (2021)
Brian Crafton, Arijit Raychowdhury, Sung Kyu Lim
Automatic Generation of Translators for Packet-Based and Emerging Protocols. ISQED (2021)
Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
Pseudo-3D Physical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements. ACM Trans. Design Autom. Electr. Syst. 26 (5) (2021)
Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna, Sung Kyu Lim
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. IEEE Trans. Very Large Scale Integr. Syst. 29 (4) (2021)
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISPD (2021)
Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim
RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning. DAC (2021)
Anthony Agnesina, Moritz Brunion, Jinwoo Kim, Alberto García Ortiz, Dragomir Milojevic, Francky Catthoor, Manu Perumkunnil, Sung Kyu Lim
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs. ISLPED (2021)
Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors. IEEE Trans. Very Large Scale Integr. Syst. 29 (6) (2021)
Gauthaman Murali, Sung Kyu Lim
Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies. DATE (2021)
Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim
Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture. ISLPED (2021)
Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. CoRR (2021)
Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Jinwoo Kim, Gauthaman Murali, Edward Lee, Daehyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty
Advances in Design and Test of Monolithic 3-D ICs. IEEE Des. Test 37 (4) (2020)
Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. ICCD (2020)
Anthony Agnesina, Da Eun Shim, James Yamaguchi, Christian Krutzik, John Carson, Dan Nakamura, Sung Kyu Lim
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications. ICCD (2020)
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics. VLSI-SoC (Selected Papers) (2020)
Lingjun Zhu, Kyungwook Chang, Dusan Petranovic, Saurabh Sinha, Yun Seop Yu, Sung Kyu Lim
Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs. ISPD (2020)
Anthony Agnesina, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim
A COTS-Based Novel 3-D DRAM Memory Cube Architecture for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 28 (9) (2020)
Anthony Agnesina, Sung Kyu Lim, Etienne Lepercq, Jose Escobedo Del Cid
Improving FPGA-Based Logic Emulation Systems through Machine Learning. ACM Trans. Design Autom. Electr. Syst. 25 (5) (2020)
Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs. ISPD (2020)
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28 (11) (2020)
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics. CoRR (2020)
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. CoRR (2020)
Yi-Chen Lu, Sai Surya Kiran Pentapati, Lingjun Zhu, Kambiz Samadi, Sung Kyu Lim
TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs. DAC (2020)
Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim
Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. ICCAD (2020)
Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim
Vortex: OpenCL Compatible RISC-V GPGPU. CoRR (2020)
Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. DATE (2020)
Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim
RTL-to-GDS Design Tools for Monolithic 3D ICs. ICCAD (2020)
Bon Woong Ku, Sung Kyu Lim
Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs. ISLPED (2020)
Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM. IEEE Comput. Archit. Lett. 19 (1) (2020)
Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Yi-Chen Lu, Siddhartha Nath, Sai Surya Kiran Pentapati, Sung Kyu Lim
A Fast Learning-Driven Signoff Power Optimization Framework. ICCAD (2020)
Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty
. ATS (2020)
Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim
VLSI Placement Parameter Optimization using Deep Reinforcement Learning. ICCAD (2020)
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics. VLSI-SOC (2020)
Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. DAC (2019)
Sai Surya Kiran Pentapati, Da Eun Shim, Sung Kyu Lim
Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary. ACM Great Lakes Symposium on VLSI (2019)
Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim
GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization. ICCAD (2019)
Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
System-Level Power Delivery Network Analysis and Optimization for Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 27 (4) (2019)
Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs. ISLPED (2019)
Hakki Mert Torun, Huan Yu, Nihar Dasari, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Madhavan Swaminathan
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors. ICCAD (2019)
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. DAC (2019)
Anthony Agnesina, Etienne Lepercq, Jose Escobedo, Sung Kyu Lim
Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning. ICCAD (2019)
Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology. IEEE Micro 39 (6) (2019)
Tianchen Wang, Sandeep Kumar Samal, Sung Kyu Lim, Yiyu Shi
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ETS (2019)
Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim
Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor. DAC (2018)
Bon Woong Ku, Yu Liu, Yingyezhe Jin, Peng Li, Sung Kyu Lim
Area-efficient and low-power face-to-face-bonded 3D liquid state machine design. ICCAD (2018)
Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim
Power, Performance, and Area Benefit of Monolithic 3D ICs for On-Chip Deep Neural Networks Targeting Speech Recognition. ACM J. Emerg. Technol. Comput. Syst. 14 (4) (2018)
Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim
Compact-2D: A Physical Design Methodology to Build Commercial-Quality Face-to-Face-Bonded 3D ICs. ISPD (2018)
Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs. ISLPED (2018)
Md Musabbir Adnan, Sagarvarma Sayyaparaju, Garrett S. Rose, Catherine D. Schuman, Bon Woong Ku, Sung Kyu Lim
A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems. SoCC (2018)
Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, Li Jiang
In-growth test for monolithic 3D integrated SRAM. DATE (2018)
Anthony Agnesina, Amanvir Sidana, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim
A novel 3D DRAM memory cube architecture for space applications. DAC (2018)
Sandeep Kumar Samal, Sourabh Khandelwal, Asif I. Khan, Sayeef S. Salahuddin, Chenming Hu, Sung Kyu Lim
Full chip power benefits with negative capacitance FETs. ISLPED (2017)
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (10) (2017)

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Sung Kyu Lim