Yu Cao

ORCID

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 115

Top Venues

CoRR

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ISCAS

ACM J. Emerg. Technol. Comput. Syst.

Publications

Han-Sok Suh, Jian Meng, Ty Nguyen, Vijay Kumar, Yu Cao, Jae-Sun Seo
Algorithm-hardware Co-optimization for Energy-efficient Drone Detection on Resource-constrained FPGA. ACM Trans. Reconfigurable Technol. Syst. 16 (2) (2023)
Jeffrey S. Vetter, Prasanna Date, Farah Fahim, Shruti R. Kulkarni, Petro Maksymovych, A. Alec Talin, Marc González Tallada, Pruek Vanna-Iampikul, Aaron R. Young, David Brooks, Yu Cao, Gu-Yeon Wei, Sung Kyu Lim, Frank Liu, Matthew J. Marinella, Bobby G. Sumpter, Narasinga Rao Miniskar
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials. Int. J. High Perform. Comput. Appl. 37 (3-4) (2023)
Fan Zhang, Wangxin He, Injune Yeo, Maximilian Liehr, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan
A 65nm RRAM Compute-in-Memory Macro for Genome Sequencing Alignment. ESSCIRC (2023)
Tianyi Zhang, Kishore Kasichainula, Yaoxin Zhuo, Baoxin Li, Jae-sun Seo, Yu Cao
Transformer-based Selective Super-Resolution for Efficient Image Refinement. CoRR (2023)
Zhenhua Zhu, Hanbo Sun, Tongxin Xie, Yu Zhu, Guohao Dai, Lixue Xia, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Huazhong Yang, Yu Wang
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Zhenyu Wang, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Jae-Sun Seo, Chaitali Chakrabarti, Ümit Y. Ogras, Vidya A. Chhabria, Yu Cao
Benchmarking Heterogeneous Integration with 2.5D/3D Interconnect Modeling. ASICON (2023)
Tianyi Zhang, Kishore Kasichainula, Yaoxin Zhuo, Baoxin Li, Jae-Sun Seo, Yu Cao
Patch-based Selection and Refinement for Early Object Detection. CoRR (2023)
Tianyi Zhang, Kishore Kasichainula, Dong-Woo Jee, Injune Yeo, Yaoxin Zhuo, Baoxin Li, Jae-sun Seo, Yu Cao
Improving the Efficiency of CMOS Image Sensors through In-Sensor Selective Attention. ISCAS (2023)
Dong-Woo Jee, Seong-Min Ko, Kishore Kasichainula, Injune Yeo, Yu Cao, Jae-Sun Seo
A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image Processing. ESSCIRC (2023)
Gopikrishnan Raveendran Nair, Han-Sok Suh, Mahantesh Halappanavar, Frank Liu, Jae-sun Seo, Yu Cao
FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix. DATE (2023)
Abhishek Moitra, Abhiroop Bhattacharjee, Runcong Kuang, Gokul Krishnan, Yu Cao, Priyadarshini Panda
SpikeSim: An End-to-End Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Ahmed Hasssan, Jian Meng, Yu Cao, Jae-sun Seo
Spatial-temporal Data Compression of Dynamic Vision Sensor Output with High Pixel-level Saliency using Low-precision Sparse Autoencoder. IEEECONF (2022)
Sumit K. Mandal, Gokul Krishnan, A. Alper Goksoy, Gopikrishnan Ravindran Nair, Yu Cao, Ümit Y. Ogras
COIN: Communication-Aware In-Memory Acceleration for Graph Convolutional Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Abhishek Moitra, Abhiroop Bhattacharjee, Runcong Kuang, Gokul Krishnan, Yu Cao, Priyadarshini Panda
SpikeSim: An end-to-end Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks. CoRR (2022)
Jingbo Sun, Li Yang, Jiaxin Zhang, Frank Liu, Mahantesh Halappanavar, Deliang Fan, Yu Cao
Gradient-Based Novelty Detection Boosted by Self-Supervised Binary Classification. AAAI (2022)
Gokul Krishnan, A. Alper Goksoy, Sumit K. Mandal, Zhenyu Wang, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
Big-Little Chiplets for In-Memory Acceleration of DNNs: A Scalable Heterogeneous Architecture. ICCAD (2022)
Gokul Krishnan, Li Yang, Jingbo Sun, Jubin Hazra, Xiaocong Du, Maximilian Liehr, Zheng Li, Karsten Beckmann, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Yu Cao
Exploring Model Stability of Deep Neural Networks for Reliable RRAM-Based In-Memory Acceleration. IEEE Trans. Computers 71 (11) (2022)
Xiaocong Du, Shreyas Kolala Venkataramanaiah, Zheng Li, Han-Sok Suh, Shihui Yin, Gokul Krishnan, Frank Liu, Jae-sun Seo, Yu Cao
Efficient continual learning at the edge with progressive segmented training. Neuromorph. Comput. Eng. 2 (4) (2022)
Fan Zhang, Li Yang, Jian Meng, Jae-Sun Seo, Yu Cao, Deliang Fan
XST: A Crossbar Column-wise Sparse Training for Efficient Continual Learning. DATE (2022)
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Gokul Krishnan, Zhenyu Wang, Injune Yeo, Li Yang, Jian Meng, Maximilian Liehr, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Jae-Sun Seo, Yu Cao
Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Sumit K. Mandal, Gokul Krishnan, A. Alper Goksoy, Gopikrishnan Ravindran Nair, Yu Cao, Ümit Y. Ogras
COIN: Communication-Aware In-Memory Acceleration for Graph Convolutional Networks. CoRR (2022)
Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks. CoRR (2021)
Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo
End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression. FPL (2021)
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao
System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration. ASICON (2021)
Jingbo Sun, Li Yang, Jiaxin Zhang, Frank Liu, Mahantesh Halappanavar, Deliang Fan, Yu Cao
Self-supervised Novelty Detection for Continual Learning: A Gradient-Based Approach Boosted by Binary Classification. CSSL (2021)
Yufei Ma, Gokul Krishnan, Yu Cao, Le Ye, Ru Huang
SWIFT: Small-World-based Structural Pruning to Accelerate DNN Inference on FPGA. FPGA (2021)
Gokul Krishnan, Jingbo Sun, Jubin Hazra, Xiaocong Du, Maximilian Liehr, Zheng Li, Karsten Beckmann, Rajiv V. Joshi, Nathaniel C. Cady, Yu Cao
Robust RRAM-based In-Memory Computing in Light of Model Stability. IRPS (2021)
Jingbo Sun, Li Yang, Jiaxin Zhang, Frank Liu, Mahantesh Halappanavar, Deliang Fan, Yu Cao
Gradient-based Novelty Detection Boosted by Self-supervised Binary Classification. CoRR (2021)
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks. CoRR (2021)
Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 20 (5s) (2021)
Xiaocong Du, Bhargav Bhushanam, Jiecao Yu, Dhruv Choudhary, Tianxiang Gao, Sherman Wong, Louis Feng, Jongsoo Park, Yu Cao, Arun Kejariwal
Alternate Model Growth and Pruning for Efficient Training of Recommendation Systems. CoRR (2021)
Xiaocong Du, Bhargav Bhushanam, Jiecao Yu, Dhruv Choudhary, Tianxiang Gao, Sherman Wong, Louis Feng, Jongsoo Park, Yu Cao, Arun Kejariwal
Alternate Model Growth and Pruning for Efficient Training of Recommendation Systems. ICMLA (2021)
Adnan Siraj Rakin, Li Yang, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Yu Cao, Jae-sun Seo, Deliang Fan
RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracy. CoRR (2021)
Han-Sok Suh, Jian Meng, Ty Nguyen, Shreyas K. Venkataramanaiah, Vijay Kumar, Yu Cao, Jae-sun Seo
Algorithm-Hardware Co-Optimization for Energy-Efficient Drone Detection on Resource-Constrained FPGA. FPT (2021)
Xiaocong Du, Zheng Li, Jingbo Sun, Frank Liu, Yu Cao
Evolutionary NAS in Light of Model Stability for Accurate Continual Learning. IJCNN (2021)
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo
Performance Modeling for CNN Inference Accelerators on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (4) (2020)
Li Yang, Zhezhi He, Yu Cao, Deliang Fan
Non-uniform DNN Structured Subnets Sampling for Dynamic Inference. DAC (2020)
Zheng Li, Xiaocong Du, Yu Cao
DAT-RNN: Trajectory Prediction with Diverse Attention. ICMLA (2020)
Zheng Li, Xiaocong Du, Yu Cao
GAR: Graph Assisted Reasoning for Object Detection. WACV (2020)
Shreyas K. Venkataramanaiah, Han-Sok Suh, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-Sun Seo
FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High Bandwidth Memory. ICCAD (2020)
Gouranga Charan, Jubin Hazra, Karsten Beckmann, Xiaocong Du, Gokul Krishnan, Rajiv V. Joshi, Nathaniel C. Cady, Yu Cao
Accurate Inference with Inaccurate RRAM Devices: Statistical Data, Model Transfer, and On-line Adaptation. DAC (2020)
Xiaocong Du, Zheng Li, Jae-sun Seo, Frank Liu, Yu Cao
Noise-based Selection of Robust Inherited Model for Accurate Continual Learning. CVPR Workshops (2020)
Shreyas K. Venkataramanaiah, Shihui Yin, Yu Cao, Jae-Sun Seo
Deep Neural Network Training Accelerator Designs in ASIC and FPGA. ISOCC (2020)
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo
Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (2) (2020)
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs. IEEE Des. Test 37 (6) (2020)
Sumit K. Mandal, Gokul Krishnan, Chaitali Chakrabarti, Jae-Sun Seo, Yu Cao, Ümit Y. Ogras
A Latency-Optimized Reconfigurable NoC for In-Memory Acceleration of DNNs. IEEE J. Emerg. Sel. Topics Circuits Syst. 10 (3) (2020)
Zhenhua Zhu, Hanbo Sun, Kaizhong Qiu, Lixue Xia, Gokul Krishnan, Guohao Dai, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Yu Wang, Huazhong Yang
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems. ACM Great Lakes Symposium on VLSI (2020)
Xiaocong Du, Shreyas Kolala Venkataramanaiah, Zheng Li, Jae-sun Seo, Frank Liu, Yu Cao
Online Knowledge Acquisition with the Selective Inherited Model. IJCNN (2020)
Shreyas Kolala Venkataramanaiah, Xiaocong Du, Zheng Li, Shihui Yin, Yu Cao, Jae-sun Seo
Efficient and Modularized Training on FPGA for Real-time Applications. IJCAI (2020)
Xiaocong Du, Gokul Krishnan, Abinash Mohanty, Zheng Li, Gouranga Charan, Yu Cao
Towards Efficient Neural Networks On-a-chip: Joint Hardware-Algorithm Approaches. CoRR (2019)
Xiaocong Du, Zheng Li, Yu Cao
CGaP: Continuous Growth and Pruning for Efficient Deep Learning. CoRR (2019)
Xiaocong Du, Gouranga Charan, Frank Liu, Yu Cao
Single-Net Continual Learning with Progressive Segmented Training. ICMLA (2019)
Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
Automatic Compiler Based FPGA Accelerator for CNN Training. FPL (2019)
Shihui Yin, Minkyu Kim, Deepak Kadetotad, Yang Liu, Chisung Bae, Sang Joon Kim, Yu Cao, Jae-sun Seo
A 1.06- $\mu$ W Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring. IEEE J. Solid State Circuits 54 (8) (2019)
Jae-Sun Seo, Yu Cao, Xin Li, Paul N. Whatmough
Guest Editors' Introduction: Hardware and Algorithms for Energy-Constrained On-Chip Machine Learning (Part 2). ACM J. Emerg. Technol. Comput. Syst. 15 (4) (2019)
Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
Automatic Compiler Based FPGA Accelerator for CNN Training. CoRR (2019)
Xiaocong Du, Zheng Li, Yufei Ma, Yu Cao
Efficient Network Construction through Structural Plasticity. CoRR (2019)
Xiaocong Du, Gouranga Charan, Frank Liu, Yu Cao
Single-Net Continual Learning with Progressive Segmented Training (PST). CoRR (2019)
Gokul Krishnan, Xiaocong Du, Yu Cao
Structural Pruning in Deep Neural Networks: A Small-World Approach. CoRR (2019)
Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Luning Wei, Xiaofei He, Yu Cao, Jae-sun Seo
A Real-Time 17-Scale Object Detection Accelerator With Adaptive 2000-Stage Classification in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2019)
Jae-sun Seo, Yu Cao, Xin Li, Paul N. Whatmough
Guest Editors' Introduction to the Special Section on Hardware and Algorithms for Energy-Constrained On-chip Machine Learning. ACM J. Emerg. Technol. Comput. Syst. 15 (2) (2019)
Xiaocong Du, Zheng Li, Yufei Ma, Yu Cao
Efficient Network Construction Through Structural Plasticity. IEEE J. Emerg. Sel. Topics Circuits Syst. 9 (3) (2019)
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 26 (7) (2018)
Prad Kadambi, Abinash Mohanty, Hao Ren, Jaclyn Smith, Kevin McGuinnes, Kimberly Holt, Armin Furtwaengler, Roberto Slepetys, Zheng Yang, Jae-sun Seo, Junseok Chae, Yu Cao, Visar Berisha
Towards a Wearable Cough Detector Based on Neural Networks. ICASSP (2018)
Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim
Power, Performance, and Area Benefit of Monolithic 3D ICs for On-Chip Deep Neural Networks Targeting Speech Recognition. ACM J. Emerg. Technol. Comput. Syst. 14 (4) (2018)
Devyani Patra, Jiayang Zhang, Runsheng Wang, Mehdi Katoozi, Ethan H. Cannon, Ru Huang, Yu Cao
Compact modeling and simulation of accelerated circuit aging. CICC (2018)
Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang
MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (5) (2018)
Robert D'Angelo, Xiaocong Du, Christopher D. Salthouse, Brent Hollosi, Geremy Freifeld, Wes Uy, Haiyao Huang, Nhut Tran, Armand Chery, Jae-sun Seo, Yu Cao, Dorothy C. Poppe, Sameer R. Sonkusale
Process Scalability of Pulse-Based Circuits for Analog Image Convolution. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2018)
Lina J. Karam, Tejas S. Borkar, Yu Cao, Junseok Chae
Generative Sensing: Transforming Unreliable Sensor Data for Reliable Recognition. MIPR (2018)
Devyani Patra, Ahmed Kamal Reza, Mehdi Katoozi, Ethan H. Cannon, Kaushik Roy, Yu Cao
Accelerated BTI degradation under stochastic TDDB effect. IRPS (2018)
Lina J. Karam, Tejas S. Borkar, Yu Cao, Junseok Chae
Generative Sensing: Transforming Unreliable Sensor Data for Reliable Recognition. CoRR (2018)
Chetan Singh Thakur, Jamal Molin, Gert Cauwenberghs, Giacomo Indiveri, Kundan Kumar, Ning Qiao, Johannes Schemmel, Runchun Wang, Elisabetta Chicca, Jennifer Olson Hasler, Jae-sun Seo, Shimeng Yu, Yu Cao, André van Schaik, Ralph Etienne-Cummings
Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain. CoRR (2018)
Yu Cao, Xin Li, Jae-sun Seo, Ganesh Dasika
Guest Editors' Introduction: Frontiers of Hardware and Algorithms for On-chip Learning. ACM J. Emerg. Technol. Comput. Syst. 14 (2) (2018)
Devyani Patra, Ahmed Kamal Reza, Mohammad Khaled Hassan, Mehdi Katoozi, Ethan H. Cannon, Kaushik Roy, Yu Cao
Adaptive accelerated aging for 28 nm HKMG technology. Microelectron. Reliab. 80 (2018)
Yufei Ma, Tu Zheng, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs. ICCAD (2018)
Yufei Ma, Naveen Suda, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler. Integr. 62 (2018)
Yufei Ma, Minkyu Kim, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
End-to-end scalable FPGA accelerator for deep residual networks. ISCAS (2017)
Zihan Xu, Steven Skorheim, Ming Tu, Visar Berisha, Shimeng Yu, Jae-sun Seo, Maxim Bazhenov, Yu Cao
Improving efficiency in sparse learning with the feedforward inhibitory motif. Neurocomputing 267 (2017)
Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim
Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition. ISLPED (2017)
Chengen Yang, Manqing Mao, Yu Cao, Chaitali Chakrabarti
Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance. IEEE Trans. Multi Scale Comput. Syst. 3 (1) (2017)
Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He, Yu Cao, Jae-sun Seo
A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. ISCAS (2017)
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks. FPGA (2017)
Yu Cao, Xin Li, Taemin Kim, Suyog Gupta
Guest Editors' Introduction: Hardware and Algorithms for On-Chip Learning. ACM J. Emerg. Technol. Comput. Syst. 13 (3) (2017)
Abinash Mohanty, Ketul B. Sutaria, Hiromitsu Awano, Takashi Sato, Yu Cao
RTN in Scaled Transistors for On-Chip Random Seed Generation. IEEE Trans. Very Large Scale Integr. Syst. 25 (8) (2017)
Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations. BioCAS (2017)
Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activations. CoRR (2017)
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
An automatic RTL compiler for high-throughput FPGA implementation of diverse deep convolutional neural networks. FPL (2017)
Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He, Yu Cao, Jae-sun Seo
A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. ASP-DAC (2017)
Yufei Ma, Naveen Suda, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula
Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. FPL (2016)
Lixue Xia, Peng Gu, Boxun Li, Tianqi Tang, Xiling Yin, Wenqin Huangfu, Shimeng Yu, Yu Cao, Yu Wang, Huazhong Yang
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication. J. Comput. Sci. Technol. 31 (1) (2016)
Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang
MNSIM: Simulation platform for memristor-based neuromorphic computing system. DATE (2016)
Dawei Zhou, Jingrui He, Yu Cao, Jae-sun Seo
Bi-Level Rare Temporal Pattern Detection. ICDM (2016)
Naveen Suda, Jounghyuk Suh, Nagib Hakim, Yu Cao, Bertan Bakkaloglu
A 65 nm Programmable ANalog Device Array (PANDA) for Analog Circuit Emulation. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2016)
Pai-Yu Chen, Jae-sun Seo, Yu Cao, Shimeng Yu
Compact oscillation neuron exploiting metal-insulator-transition for neuromorphic computing. ICCAD (2016)
Ming Tu, Visar Berisha, Yu Cao, Jae-sun Seo
Reducing the Model Order of Deep Neural Networks Using Information Theory. CoRR (2016)
Naveen Suda, Vikas Chandra, Ganesh Dasika, Abinash Mohanty, Yufei Ma, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao
Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks. FPGA (2016)
Ming Tu, Visar Berisha, Martin Woolf, Jae-sun Seo, Yu Cao
Ranking the parameters of deep neural networks using the fisher information. ICASSP (2016)
Ming Tu, Visar Berisha, Yu Cao, Jae-sun Seo
Reducing the Model Order of Deep Neural Networks Using Information Theory. ISVLSI (2016)
Abinash Mohanty, Naveen Suda, Minkyu Kim, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao
High-performance face detection with CPU-FPGA acceleration. ISCAS (2016)

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Publication Activity (10 Years)

Top Topics

Top Venues

Yu Cao