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Chengen Yang
ORCID
Publication Activity (10 Years)
Years Active: 1991-2017
Publications (10 Years): 1
Top Topics
Low Cost
Multi Tiered
Error Control
Reed Solomon
Top Venues
SiPS
J. Signal Process. Syst.
ICCD
ICASSP
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Publications
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Chengen Yang
,
Manqing Mao
,
Yu Cao
,
Chaitali Chakrabarti
Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance.
IEEE Trans. Multi Scale Comput. Syst.
3 (1) (2017)
Manqing Mao
,
Chengen Yang
,
Zihan Xu
,
Yu Cao
,
Chaitali Chakrabarti
Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systems.
SiPS
(2014)
Roisin Langan
,
Richard Archibald
,
Matthew Plumlee
,
Salil Mahajan
,
Daniel M. Ricciuto
,
Chengen Yang
,
Rui Mei
,
Jiafu Mao
,
Xiaoying Shi
,
Joshua S. Fu
Stochastic Parameterization to Represent Variability and Extremes in Climate Modeling.
ICCS
(2014)
Chengen Yang
,
Yunus Emre
,
Zihan Xu
,
Hsing Min Chen
,
Yu Cao
,
Chaitali Chakrabarti
A Low Cost Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell Pram.
J. Signal Process. Syst.
76 (2) (2014)
Chengen Yang
,
Hsing Min Chen
,
Trevor N. Mudge
,
Chaitali Chakrabarti
Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding.
J. Signal Process. Syst.
76 (3) (2014)
Zihan Xu
,
Ketul Sutaria
,
Chengen Yang
,
Chaitali Chakrabarti
,
Yu Cao
Compact modeling of STT-MTJ for SPICE simulation.
ESSDERC
(2013)
Chengen Yang
,
Deepak Muckatira
,
Aditya Kulkarni
,
Chaitali Chakrabarti
Data storage time sensitive ECC schemes for MLC NAND Flash memories.
ICASSP
(2013)
Zihan Xu
,
Ketul Sutaria
,
Chengen Yang
,
Chaitali Chakrabarti
,
Yu Cao
Hierarchical modeling of Phase Change memory for reliable design.
ICCD
(2012)
Chengen Yang
,
Yunus Emre
,
Chaitali Chakrabarti
Product Code Schemes for Error Correction in MLC NAND Flash Memories.
IEEE Trans. Very Large Scale Integr. Syst.
20 (12) (2012)
Chengen Yang
,
Yunus Emre
,
Yu Cao
,
Chaitali Chakrabarti
Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding.
EURASIP J. Adv. Signal Process.
2012 (2012)
Yunus Emre
,
Chengen Yang
,
Ketul Sutaria
,
Yu Cao
,
Chaitali Chakrabarti
Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques.
SiPS
(2012)
Chengen Yang
,
Yunus Emre
,
Yu Cao
,
Chaitali Chakrabarti
Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell PRAM.
SiPS
(2012)
Chengen Yang
,
Yunus Emre
,
Chaitali Chakrabarti
,
Trevor N. Mudge
Flexible product code-based ECC schemes for MLC NAND Flash memories.
SiPS
(2011)
Chengen Yang
,
Dayong Jin
A primal-dual algorithm for the minimum average weighted length circuit problem.
Networks
21 (7) (1991)