Jan Moritz Joseph

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 58

Top Topics

Fault Injection

Pose Estimation

Design Space Exploration

Top Venues

Publications

Rebecca Pelke, Felix Staudigl, Niklas Thomas, Nils Bosbach, Mohammed Hossein, José Cubero-Cascante, Letícia Maria Veiras Bolzani, Rainer Leupers, Jan Moritz Joseph
A Fully Automated Platform for Evaluating ReRAM Crossbars. LATS (2024)
L. Pfeifer, M. Gross, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph
Analysis of Thermal Side-Channel Attacks on Analog/Digital Computing-in-Memory Accelerators. LATS (2024)
José Cubero-Cascante, Arunkumar Vaidyanathan, Rebecca Pelke, Lorenzo Pfeifer, Rainer Leupers, Jan Moritz Joseph
A Calibratable Model for Fast Energy Estimation of MVM Operations on RRAM Crossbars. AICAS (2024)
Felix Staudigl, Jan Philipp Thoma, Christian Niesler, Karl J. X. Sturm, Rebecca Pelke, Dominik Germek, Jan Moritz Joseph, Tim Güneysu, Lucas Davi, Rainer Leupers
NVM-Flip: Non-Volatile-Memory BitFlips on the System Level. SAT-CPS@CODASPY (2024)
Rebecca Pelke, José Cubero-Cascante, Nils Bosbach, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph
CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures. DATE (2024)
Rebecca Pelke, José Cubero-Cascante, Nils Bosbach, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph
CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures. CoRR (2024)
Rebecca Pelke, Felix Staudigl, Niklas Thomas, Nils Bosbach, Mohammed Hossein, José Cubero-Cascante, Leticia Bolzani Poehls, Rainer Leupers, Jan Moritz Joseph
A Fully Automated Platform for Evaluating ReRAM Crossbars. CoRR (2024)
José Cubero-Cascante, Niko Zurstraßen, Jörn Nöller, Rainer Leupers, Jan Moritz Joseph
parti-gem5: gem5's Timing Mode Parallelised. CoRR (2023)
José Cubero-Cascante, Niko Zurstraßen, Jörn Nöller, Rainer Leupers, Jan Moritz Joseph
parti-gem5: gem5's Timing Mode Parallelised. SAMOS (2023)
Rebecca Pelke, Nils Bosbach, José Cubero-Cascante, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph
Mapping of CNNs on multi-core RRAM-based CIM architectures. CoRR (2023)
Rebecca Pelke, Nils Bosbach, José Cubero-Cascante, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph
Mapping of CNNs on multi-core RRAM-based CIM architectures. VLSI-SoC (2023)
Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Bolzani Pöhls, Rainer Leupers
Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware. DAC (2023)
Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Leticia Bolzani Poehls, Rainer Leupers
Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware. CoRR (2023)
Niko Zurstraßen, José Cubero-Cascante, Jan Moritz Joseph, Li Yichao, Xinghua Xie, Rainer Leupers
par-gem5: Parallelizing gem5's Atomic Mode. DATE (2023)
Niko Zurstraßen, Nils Bosbach, Jan Moritz Joseph, Lukas Jünger, Jan Henrik Weinstock, Rainer Leupers
Efficient RISC-V-on-x64 Floating Point Simulation. ICCD (2023)
Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Veiras Bolzani Poehls, Rainer Leupers
Invited Paper: A Holistic Fault Injection Platform for Neuromorphic Hardware. LATS (2023)
Felix Staudigl, Mohammed Hossein, Tobias Ziegler, Hazem Al Indari, Rebecca Pelke, Sebastian Siegel, Dirk J. Wouters, Dominik Sisejkovic, Jan Moritz Joseph, Rainer Leupers
Work-in-Progress: A Universal Instrumentation Platform for Non-Volatile Memories. CODES+ISSS (2023)
Ananda Samajdar, Jan Moritz Joseph, Tushar Krishna
AIrchitect: Automating Hardware Architecture and Mapping Optimization. DATE (2023)
Felix Staudigl, Mohammed Hossein, Tobias Ziegler, Hazem Al Indari, Rebecca Pelke, Sebastian Siegel, Dirk J. Wouters, Dominik Sisejkovic, Jan Moritz Joseph, Rainer Leupers
Work-in-Progress: A Universal Instrumentation Platform for Non-Volatile Memories. CoRR (2023)
Yee Yang Tan, Felix Staudigl, Lukas Jünger, Anna Drewes, Rainer Leupers, Jan Moritz Joseph
EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs. CoRR (2022)
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Behnam Razi Perjikolaei, Alberto García-Ortiz, Thilo Pionteck
Ratatoskr: An Open-Source Framework for In-Depth Power, Performance, and Area Analysis and Optimization in 3D NoCs. ACM Trans. Model. Comput. Simul. 32 (1) (2022)
Felix Staudigl, Karl J. X. Sturm, Maximilian Bartel, Thorben Fetz, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Bolzani Pöhls, Rainer Leupers
X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation. AICAS (2022)
Felix Staudigl, Hazem Al Indari, Daniel Schön, Dominik Sisejkovic, Farhad Merchant, Jan Moritz Joseph, Vikas Rana, Stephan Menzel, Rainer Leupers
NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories. DATE (2022)
Nils Bosbach, Jan Moritz Joseph, Rainer Leupers, Lukas Jünger
NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool. VLSI-SoC (2022)
Nils Bosbach, Lukas Jünger, Jan Moritz Joseph, Rainer Leupers
NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool. CoRR (2022)
Yee Yang Tan, Felix Staudigl, Lukas Jünger, Anna Drewes, Rainer Leupers, Jan Moritz Joseph
EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs. FPL (2022)
Felix Staudigl, Karl J. X. Sturm, Maximilian Bartel, Thorben Fetz, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Bolzani Pöhls, Rainer Leupers
X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation. CoRR (2022)
Jan Moritz Joseph, Murat Sezgin Baloglu, Yue Pan, Rainer Leupers, Lennart Bamberg
NEWROMAP: mapping CNNs to NoC-interconnected self-contained data-flow accelerators for edge-AI. NOCS (2021)
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. ISQED (2021)
Lennart Bamberg, Tushar Krishna, Jan Moritz Joseph
Technology-aware Router Architectures for On-Chip-Networks in Heterogeneous Technologies. NANOCOM (2021)
Ananda Samajdar, Jan Moritz Joseph, Matthew Denton, Tushar Krishna
AIRCHITECT: Learning Custom Architecture Design and Mapping Space. CoRR (2021)
Jan Moritz Joseph, Lennart Bamberg, Geonhwa Jeong, Ruei-Ting Chien, Rainer Leupers, Alberto García-Ortiz, Tushar Krishna, Thilo Pionteck
Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architectures. ASP-DAC (2021)
Felix Staudigl, Hazem Al Indari, Daniel Schön, Dominik Sisejkovic, Farhad Merchant, Jan Moritz Joseph, Vikas Rana, Stephan Menzel, Rainer Leupers
NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories. CoRR (2021)
Anna Drewes, Jan Moritz Joseph, Bala Gurumurthy, David Broneske, Gunter Saake, Thilo Pionteck
Optimising Operator Sets for Analytical Database Processing on FPGAs. ARC (2020)
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. CoRR (2020)
Ananda Samajdar, Jan Moritz Joseph, Yuhao Zhu, Paul N. Whatmough, Matthew Mattina, Tushar Krishna
A Systematic Methodology for Characterizing Scalability of DNN Accelerators using SCALE-Sim. ISPASS (2020)
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck
System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips. ICCD (2019)
Daniele Passaretti, Jan Moritz Joseph, Thilo Pionteck
Survey on FPGAs in Medical Radiology Applications: Challenges, Architectures and Programming Models. FPT (2019)
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel, Behnam Razi Perjikolaei, Anna Drewes, Alberto García-Ortiz, Thilo Pionteck
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures. CoRR (2019)
Jan Moritz Joseph, Dominik Ermel, Tobias Drewes, Lennart Bamberg, Alberto García-Ortiz, Thilo Pionteck
Area Optimization with Non-Linear Models in Core Mapping for System-on-Chips. MOCAST (2019)
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Behnam Razi Perjikolaei, Alberto García Ortiz, Thilo Pionteck
Ratatoskr: An open-source framework for in-depth power, performance and area analysis in 3D NoCs. CoRR (2019)
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Robert Schmidt, Thilo Pionteck, Alberto García Ortiz
Simulation environment for link energy estimation in networks-on-chip with virtual channels. Integr. 68 (2019)
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel, Behnam Razi Perjikolaei, Anna Drewes, Alberto García Ortiz, Thilo Pionteck
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures. IEEE Access 7 (2019)
Lennart Bamberg, Jan Moritz Joseph, Thilo Pionteck, Alberto García Ortiz
Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment. Integr. 67 (2019)
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips. CoRR (2019)
Jan Moritz Joseph, Lennart Bamberg, Gerald Krell, Imad Hajjar, Alberto García Ortiz, Thilo Pionteck
Specification of Simulation Models for NoCs in Heterogeneous 3D SoCs. ReCoSoC (2018)
Christopher Blochwitz, Julian Wolff, Mladen Berekovic, Dennis Heinrich, Sven Groppe, Jan Moritz Joseph, Thilo Pionteck
Hardware-Accelerated Index Construction for Semantic Web. FPT (2018)
Lennart Bamberg, Jan Moritz Joseph, Robert Schmidt, Thilo Pionteck, Alberto García Ortiz
Coding-aware Link Energy Estimation for 2D and 3D Networks-on-Chip with Virtual Channels. PATMOS (2018)
Tobias Drewes, Jan Moritz Joseph, Bala Gurumurthy, David Broneske, Gunter Saake, Thilo Pionteck
Efficient Inter-Kernel Communication for OpenCL Database Operators on FPGAs. FPT (2018)
Christopher Blochwitz, Raphael Klink, Jan Moritz Joseph, Thilo Pionteck
Continuous live-tracing as debugging approach on FPGAs. ReConFig (2017)
Jan Moritz Joseph, Morten Mey, Kristian Ehlers, Christopher Blochwitz, Tobias Winker, Thilo Pionteck
Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS. ReConFig (2017)
Jan Moritz Joseph, Lennart Bamberg, Sven Wrieden, Dominik Ermel, Alberto García Ortiz, Thilo Pionteck
Design method for asymmetric 3D interconnect architectures with high level models. ReCoSoC (2017)
Christopher Blochwitz, Julian Wolff, Jan Moritz Joseph, Stefan Werner, Dennis Heinrich, Sven Groppe, Thilo Pionteck
Hardware-Accelerated Radix-Tree Based String Sorting for Big Data Applications. ARCS (2017)
Jan Moritz Joseph, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck
Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs. Microprocess. Microsystems 48 (2017)
Tobias Drewes, Jan Moritz Joseph, Thilo Pionteck
An FPGA-based prototyping framework for Networks-on-Chip. ReConFig (2017)
Jan Moritz Joseph, Tobias Winker, Kristian Ehlers, Christopher Blochwitz, Thilo Pionteck
Hardware-accelerated pose estimation for embedded systems using Vivado HLS. ReConFig (2016)
Jan Moritz Joseph, Sven Wrieden, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck
A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip. ReCoSoC (2016)
Jan Moritz Joseph, Christopher Blochwitz, Thilo Pionteck
Adaptive allocation of default router paths in Network-on-Chips for latency reduction. HPCS (2016)
Jan Moritz Joseph, Christopher Blochwitz, Thilo Pionteck, Alberto García Ortiz
Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs. NORCAS (2015)
Christopher Blochwitz, Jan Moritz Joseph, Rico Backasch, Thilo Pionteck, Stefan Werner, Dennis Heinrich, Sven Groppe
An optimized radix-tree for hardware-accelerated dictionary generation for semantic web databases. ReConFig (2015)
Jan Moritz Joseph, Thilo Pionteck
A cycle-accurate Network-on-Chip simulator with support for abstract task graph modeling. ISSoC (2014)
Jan Moritz Joseph, Jens Christian Claussen
A model for dynamical evolution of science in space. CoRR (2014)