Mladen Berekovic

ORCID

Publication Activity (10 Years)

Years Active: 1997-2023
Publications (10 Years): 33

Top Venues

University of Hanover (PHD)

Education History

University of Hanover

PHD

Publications

Anouar Nechi, Lukas Groth, Saleh Mulhem, Farhad Merchant, Rainer Buchty, Mladen Berekovic
FPGA-based Deep Learning Inference Accelerators: Where Are We Standing? ACM Trans. Reconfigurable Technol. Syst. 16 (4) (2023)
Philipp Grothe, Saleh Mulhem, Mladen Berekovic
An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits. ARC (2023)
Julian Petzold, Mostafa Wahby, Youssef Ziad, Mostafa ElSheikh, Ahmed Dawood, Mladen Berekovic, Heiko Hamann
Protecting Vulnerable Road Users: Semantic Video Analysis for Accident Prediction. SSCI (2023)
Andrija Neskovic, Saleh Mulhem, Alexander Treff, Rainer Buchty, Thomas Eisenbarth, Mladen Berekovic
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not? ICCAD (2023)
Andrija Neskovic, Saleh Mulhem, Alexander Treff, Rainer Buchty, Thomas Eisenbarth, Mladen Berekovic
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not? CoRR (2023)
Anouar Nechi, Ahmed Mahmoudi, Christoph Herold, Daniel Widmer, Thomas Kürner, Mladen Berekovic, Saleh Mulhem
Practical Trustworthiness Model for DNN in Dedicated 6G Application. WiMob (2023)
Anouar Nechi, Ahmed Mahmoudi, Christoph Herold, Daniel Widmer, Thomas Kürner, Mladen Berekovic, Saleh Mulhem
Practical Trustworthiness Model for DNN in Dedicated 6G Application. CoRR (2023)
Bernhard Bauer, Mouadh Ayache, Saleh Mulhem, Meirav Nitzan, Jyotika Athavale, Rainer Buchty, Mladen Berekovic
On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model. Computer 55 (9) (2022)
Christopher Blochwitz, Philipp Grothe, Sven Dreier, Waiel Aljnabi, Rainer Buchty, Mladen Berekovic
RemEduLa - Remote Education Laboratory for FPGA Design Technology. ISCAS (2022)
Sercan Körür, Philipp Jungklass, Mladen Berekovic
Echtzeitfähige Ethernet-Kommunikation in automobilen Multicore-Systemen mit hierarchischem Speicherlayout. Echtzeit (2021)
Christopher Blochwitz, León Philipp, Mladen Berekovic, Thilo Pionteck
StreamGrid - An AXI-Stream-Compliant Overlay Architecture. ARC (2021)
Alexander Dörflinger, Mark Albers, Benedikt Kleinbeck, Yejun Guan, Harald Michalik, Raphael Klink, Christopher Blochwitz, Anouar Nechi, Mladen Berekovic
A comparative survey of open-source application-class RISC-V processor implementations. CF (2021)
Christian Böttcher, Philipp Jungklass, Mladen Berekovic
Hardware-Beschleuniger für automobile Multicore-Mikrocontroller mit einer harten Echtzeitanforderung. Echtzeit (2021)
Emad Hamadaqa, Saleh Mulhem, Wael Adi, Mladen Berekovic
Contemporary Physical Clone-Resistant Identity for IoTs and Emerging Technologies. Cryptogr. 5 (4) (2021)
Philipp Jungklass, Mladen Berekovic
Static Allocation of Basic Blocks Based on Runtime and Memory Requirements in Embedded Real-Time Systems with Hierarchical Memory Layout. NG-RES@HiPEAC (2021)
Randa Zarrouk, Saleh Mulhem, Wael Adi, Mladen Berekovic
Clone-Resistant Secured Booting Based on Unknown Hashing Created in Self-Reconfigurable Platform. ARC (2021)
Philipp Jungklass, Mladen Berekovic
Cache-Kohärenz für embedded Multicore-Mikrocontroller mit harter Echtzeitanforderung. Echtzeit (2019)
Philipp Jungklass, Mladen Berekovic
MemOpt: Automated Memory Distribution for Multicore Microcontrollers with Hard Real-Time Requirements. NORCAS (2019)
Philipp Jungklass, Mladen Berekovic
Effects of Concurrent Access to Embedded Multicore Microcontrollers with Hard Real-Time Demands. SIES (2018)
Christopher Blochwitz, Julian Wolff, Mladen Berekovic, Dennis Heinrich, Sven Groppe, Jan Moritz Joseph, Thilo Pionteck
Hardware-Accelerated Index Construction for Semantic Web. FPT (2018)
Luca Mattii, Dragomir Milojevic, Peter Debacker, Yasser Sherazi, Mladen Berekovic, Praveen Raghavan
IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options. ICCAD (2017)
Patrick Siegl, Rainer Buchty, Mladen Berekovic
A bandwidth accurate, flexible and rapid simulating multi-HMC modeling tool. MEMSYS (2017)
Amel Alfahham, Mladen Berekovic
Energy efficient cooperative spectrum sensing in Cognitive Radio Sensor Network Using FPGA: A survey. FRUCT (2017)
Haris Isakovic, Radu Grosu, Denise Ratasich, Jiri Kadlec, Zdenek Pohl, Steve Kerrison, Kyriakos Georgiou, Kerstin Eder, Norbert Druml, Lillian Tadros, Flemming Christensen, Emilie Wheatley, Bastian Farkas, Rolf Meyer, Mladen Berekovic
A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2. SAFECOMP Workshops (2017)
Soenke Michalik, Soeren Michalik, Jamin Naghmouchi, Mladen Berekovic
Real-time smart stereo camera based on FPGA-SoC. Humanoids (2017)
Patrick Siegl, Rainer Buchty, Mladen Berekovic
Data-Centric Computing Frontiers: A Survey On Processing-In-Memory. MEMSYS (2016)
Syed Abbas Ali Shah, Bastian Farkas, Rolf Meyer, Mladen Berekovic
Accelerating MPSoC design space exploration within system-level frameworks. NORCAS (2016)
Rolf Meyer, Jan Wagner, Bastian Farkas, Sven Alexander Horsinka, Patrick Siegl, Rainer Buchty, Mladen Berekovic
A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC. ACM Trans. Embed. Comput. Syst. 16 (1) (2016)
Patrick Siegl, Rainer Buchty, Mladen Berekovic
Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration. RAPIDO@HiPEAC (2016)
Shaodong Qin, Mladen Berekovic
A Comparison of High-Level Design Tools for SoC-FPGA on Disparity Map Calculation Example. CoRR (2015)
Jan Wagner, Rolf Meyer, Rainer Buchty, Mladen Berekovic
A scriptable, standards-compliant reporting and logging extension for SystemC. SAMOS (2015)
Chi-Chia Sun, Heng-Chi Lai, Sin-Kun Lin, Ming-Hwa Sheu, Mladen Berekovic
High efficient hardware allocation framework of arbitrary inverse transform coding blocks in H.265. ISPACS (2015)
Patrick Siegl, Rainer Buchty, Mladen Berekovic
Revealing Potential Performance Improvements by Utilizing Hybrid Work-Sharing for Resource-Intensive Seismic Applications. PDP (2015)
Thomas Schuster, Rolf Meyer, Rainer Buchty, Luca Fossati, Mladen Berekovic
SoCRocket - A virtual platform for the European Space Agency's SoC development. ReCoSoC (2014)
Hayder Al-Khalissi, Mladen Berekovic, Andrea Marongiu
On the Relevance of Architectural Awareness for Efficient Fork/Join Support on Cluster-Based Manycores. MES (2014)
Ioanna Tsekoura, Gregor Rebel, Peter Glösekötter, Mladen Berekovic
An evaluation of energy efficient microcontrollers. ReCoSoC (2014)
Hayder Al-Khalissi, Syed Abbas Ali Shah, Mladen Berekovic
An Efficient Barrier Implementation for OpenMP-Like Parallelism on the Intel SCC. PDP (2014)
Syed Abbas Ali Shah, Jan Wagner, Thomas Schuster, Mladen Berekovic
A lightweight-system-level power and area estimation methodology for application specific instruction set processors. PATMOS (2014)
Sven Alexander Horsinka, Rolf Meyer, Jan Wagner, Rainer Buchty, Mladen Berekovic
On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration. NoCArc@MICRO (2014)
Jan Wagner, Rainer Buchty, Christian Schubert, Mladen Berekovic
Designing a low-power wireless sensor node rASIP architecture. SiPS (2013)
Boris Motruk, Jonas Diemer, Rainer Buchty, Mladen Berekovic
Power Monitoring for Mixed-Criticality on a Many-Core Platform. ARCS (2013)
Boris Motruk, Jonas Diemer, Philip Axer, Rainer Buchty, Mladen Berekovic
Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms. PRDC (2013)
Hayder Al-Khalissi, Rainer Buchty, Mladen Berekovic
Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC. ICPADS (2013)
Hayder Al-Khalissi, Andrea Marongiu, Mladen Berekovic
Low-Overhead Barrier Synchronization for OpenMP-like Parallelism on the Single-Chip Cloud Computer. MARC@RWTH (2012)
Boris Motruk, Jonas Diemer, Rainer Buchty, Rolf Ernst, Mladen Berekovic
IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality. HASE (2012)
Andy D. Pimentel, Naehyuck Chang, Mladen Berekovic
Introduction to special section ESTIMedia'09. ACM Trans. Embed. Comput. Syst. 11 (4) (2012)
Mladen Berekovic, Samarjit Chakraborty, Petru Eles, Andy D. Pimentel
Introduction to the Special Section on ESTIMedia'08. ACM Trans. Embed. Comput. Syst. 11 (S1) (2012)
Matti Bickel, Adrian Knoth, Mladen Berekovic
Evaluation of Interpreted Languages with Open MPI. EuroMPI (2011)
Hayder Al-Khalissi, Mladen Berekovic
Performance of RCCE Broadcast Algorithm in SCC. MARC Symposium (2011)
Matthias Hanke, Tim Kranich, Mladen Berekovic, Yannis Papaefstathiou
Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. Dynamically Reconfigurable Architectures (2010)
Tim Kranich, Mladen Berekovic
NoC Switch with Credit Based Guaranteed Service Support Qualified for GALS Systems. DSD (2010)
Mladen Berekovic, Andy D. Pimentel
Editorial. J. Signal Process. Syst. 60 (2) (2010)
Jamin Naghmouchi, Daniele Paolo Scarpazza, Mladen Berekovic
Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization. ICS (2010)
Dennis Bode, Mladen Berekovic, Axel Borkowski, Ludger Buker
QoR Analysis of Automated Clock-Mesh Implementation under OCV Consideration. DSD (2010)
Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. J. Signal Process. Syst. 60 (2) (2010)
Andreas Genser, Christian Bachmann, Christian Steger, Jos Hulzink, Mladen Berekovic
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing. ASAP (2009)
Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovic, Qin Zhao, Frank Bouwens, Jos Hulzink, Jef L. van Meerbergen
Design of 100 µW Wireless Sensor Nodes for Biomedical Monitoring. J. Signal Process. Syst. 57 (1) (2009)
Mladen Berekovic, Vipin Chaudhary, Alex Dean, Jason Fritts
Editorial. Microprocess. Microsystems 33 (4) (2009)
Christian Bachmann, Andreas Genser, Jos Hulzink, Mladen Berekovic, Christian Steger
A low-power ASIP for IEEE 802.15.4a ultra-wideband impulse radio baseband processing. DATE (2009)
Mladen Berekovic, Andreas Kanstein, Bingfeng Mei, Bjorn De Sutter
Mapping of nomadic multimedia applications on the ADRES reconfigurable array processor. Microprocess. Microsystems 33 (4) (2009)
Mladen Berekovic, Matthias Hanke, Thomas Schuster, Tim Kranich, Rolf Ernst
ESL design in the context of embedded systems education. WESE@ESWEEK (2009)
Jochem Govers, Jos Huisken, Mladen Berekovic, Olivier Rousseaux, Frank Bouwens, Michael De Nil, Jef L. van Meerbergen
Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP. HiPEAC (2008)
Frank Bouwens, Mladen Berekovic, Bjorn De Sutter, Georgi Gaydadjiev
Architecture Enhancements for the ADRES Coarse-Grained Reconfigurable Array. HiPEAC (2008)
Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS (2008)
Andres Garcia, Mladen Berekovic, Tom Vander Aa
Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor. ASAP (2008)
Mladen Berekovic, Tim Niggemeier
A Distributed, Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance. J. Signal Process. Syst. 50 (2) (2008)
Frederico Pratas, Georgi Gaydadjiev, Mladen Berekovic, Leonel Sousa, Stefanos Kaxiras
Low power microarchitecture with instruction reuse. Conf. Computing Frontiers (2008)
Mladen Berekovic, Andy D. Pimentel, Timo D. Hämäläinen
Editorial. J. Syst. Archit. 54 (11) (2008)
Mladen Berekovic, Christian Hochberger, Andreas Koch
Rekonfigurierbare Architekturen. Inform. Spektrum 31 (4) (2008)
Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovic, Qin Zhao, Frank Bouwens, Jef L. van Meerbergen
Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring. SAMOS (2007)
Michael De Nil, Lennart Yseboodt, Frank Bouwens, Jos Hulzink, Mladen Berekovic, Jos Huisken, Jef L. van Meerbergen
Ultra Low Power ASIP Design for Wireless Sensor Nodes. ICECS (2007)
Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger, Bjorn De Sutter
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. ESTIMedia (2007)
Lennart Yseboodt, Michael De Nil, Mladen Berekovic
Electrocardiogram on Wireless Sensor Nodes. Power-aware Computing Systems (2007)
C. Arbelo, Andreas Kanstein, Sebastián López, José Francisco López, Mladen Berekovic, Roberto Sarmiento, Jean-Yves Mignolet
Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H.264/AVC deblocking filter. DATE (2007)
Frank Bouwens, Mladen Berekovic, Andreas Kanstein, Georgi Gaydadjiev
Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array. ARC (2007)
Mladen Berekovic
Ulta-Low-Power Wireless Sensor Node Design on 100 uW Scavenging Energy for Applications In Biomedical Monitoring. DSD (2007)
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Berekovic
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture. ARC (2007)
Julien Penders, Bert Gyselinckx, Ruud J. M. Vullers, Olivier Rousseaux, Mladen Berekovic, Michael De Nil, Chris Van Hoof, Julien Ryckaert, Refet Firat Yazicioglu, Paolo Fiorini, Vladimir Leonov
Human++: Emerging Technology for Body Area Networks. VLSI-SoC (Selected Papers) (2006)
Bjorn De Sutter, Bingfeng Mei, T. Andrei Bartic, Tom Vander Aa, Mladen Berekovic, Jean-Yves Mignolet, Kris Croes, Paul Coene, Miro Cupac, Aïssa Couvreur, Andy Folens, Steven Dupont, Bert Van Thielen, Andreas Kanstein, Hong-Seok Kim, Sukjin Kim
Hardware and a Tool Chain for ADRES. ARC (2006)
Mladen Berekovic, Tim Niggemeier
A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme. SAMOS (2006)
Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch
A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications. J. VLSI Signal Process. 41 (2) (2005)
Hans-Joachim Stolberg, Mladen Berekovic, Sören Moch, Lars Friebe, Mark Bernd Kulaczewski, Sebastian Flügel, Heiko Klußmann, Andreas Dehnhardt, Peter Pirsch
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing. J. VLSI Signal Process. 41 (1) (2005)
Mladen Berekovic, Sören Moch, Peter Pirsch
A scalable, clustered SMT processor for digital signal processing. SIGARCH Comput. Archit. News 32 (3) (2004)
Sören Moch, Mladen Berekovic, Hans-Joachim Stolberg, Lars Friebe, Mark Bernd Kulaczewski, Andreas Dehnhardt, Peter Pirsch
HIBRID-SOC: a multi-core architecture for image and video applications. SIGARCH Comput. Archit. News 32 (3) (2004)
Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Xun Mao, Mark Bernd Kulaczewski, Heiko Klußmann, Peter Pirsch
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. DATE (2003)
Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. VLSI-SOC (2003)
Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Mark Bernd Kulaczewski, Peter Pirsch
HiBRID-SoC: a multi-core architecture for image and video applications. ICIP (3) (2003)
Mladen Berekovic, Hans-Joachim Stolberg, Peter Pirsch
Multicore system-on-chip architecture for MPEG-4 streaming video. IEEE Trans. Circuits Syst. Video Technol. 12 (8) (2002)
Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo
Architecture of an Image Rendering Co-Processor for MPEG-4 Visual Compositing. J. VLSI Signal Process. 31 (2) (2002)
Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch
A platform-independent methodology for performance estimation of streaming media applications. ICME (2) (2002)
Mladen Berekovic, Hans-Joachim Stolberg, Peter Pirsch, Holger Runge
A programmable co-porcessor for MPEG-4 video. ICASSP (2001)
Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch, Holger Runge
Implementing The MPEG-4 Advanced Simple Profile For Streaming Video Applications. ICME (2001)
Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo
Architecture of an Image Rendering Co-Processor for MPEG-4 Systems. ASAP (2000)
Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo
Co-processor architecture for MPEG-4 main profile visual compositing. ISCAS (2000)
Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch, Holger Runge, Henning Möller, Johannes Kneip
The M-PIRE MPEG-4 codec DSP and its macroblock engine. ISCAS (2000)
Christoph Heer, Carolina Miro, Anne Lafage, Mladen Berekovic, Giovanni Ghigo, Thorsten Selinger, Kai-Immo Wels
Coprocessor architecture for MPEG-4 video object rendering. VCIP (2000)
Helge Kloos, Mladen Berekovic, Peter Pirsch
Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-Anwendungen. ARCS (1999)
Mladen Berekovic, Helge Kloos, Peter Pirsch
Hardware Realization of a Java Virtual Machine for High Performance Multimedia Applications. J. VLSI Signal Process. 22 (1) (1999)
Mladen Berekovic, Hans-Joachim Stolberg, Mark Bernd Kulaczewski, Peter Pirsch, Henning Möller, Holger Runge, Johannes Kneip, Benno Stabernack
Instruction Set Extensions for MPEG-4 Video. J. VLSI Signal Process. 23 (1) (1999)
Christoph Heer, Carolina Miro, Anne Lafage, Mladen Berekovic, Giovanni Ghigo, Thorsten Selinger, Kai-Immo Wels
Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'. ICECS (1999)

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Publication Activity (10 Years)

Top Topics

Top Venues

Mladen Berekovic