J. VLSI Signal Process.

Keyphrases

Publications

volume 49, number 1, 2007

Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala
Stride Permutation Networks for Array Processors. J. VLSI Signal Process. 49 (1) (2007)
Anup Hosangadi, Farzan Fallah, Ryan Kastner
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. J. VLSI Signal Process. 49 (1) (2007)
Milos D. Ercegovac, Jean-Michel Muller
Complex Square Root with Operand Prescaling. J. VLSI Signal Process. 49 (1) (2007)
Jesus E. Molinar-Solis, Felipe Gomez-Castañeda, Jose A. Moreno-Cadenas, Víctor Hugo Ponce Ponce
Programmable CMOS CNN Cell Based on Floating-gate Inverter Unit. J. VLSI Signal Process. 49 (1) (2007)
Earl E. Swartzlander Jr.
The Negative Two's Complement Number System. J. VLSI Signal Process. 49 (1) (2007)
Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. 49 (1) (2007)
Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid
Buffer and Register Allocation for Memory Space Optimization. J. VLSI Signal Process. 49 (1) (2007)
Antoine Fraboulet, Tanguy Risset
Master Interface for On-chip Hardware Accelerator Burst Communications. J. VLSI Signal Process. 49 (1) (2007)
Maher E. Rizkalla, Paul Salama, Mohamed El-Sharkawy, Modukuri Sushmitha
Hardware Implementation of Block-based Motion Estimation for Real Time Applications. J. VLSI Signal Process. 49 (1) (2007)
Liang-Kai Wang, Michael J. Schulte
A Decimal Floating-Point Divider Using Newton-Raphson Iteration. J. VLSI Signal Process. 49 (1) (2007)
Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll
Special Issue on ASAP 2004 Conference. J. VLSI Signal Process. 49 (1) (2007)
Vijay Nagarajan, Stefan Laendner, Nikhil Jayakumar, Olgica Milenkovic, Sunil P. Khatri
High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems. J. VLSI Signal Process. 49 (1) (2007)
Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Arpith C. Jacob, Joseph M. Lancaster
System. J. VLSI Signal Process. 49 (1) (2007)
Jérémie Detrey, Florent de Dinechin
A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic. J. VLSI Signal Process. 49 (1) (2007)

volume 49, number 2, 2007

volume 49, number 3, 2007

volume 48, number 1-2, 2007

volume 48, number 3, 2007