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EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs.

Yee Yang TanFelix StaudiglLukas JüngerAnna DrewesRainer LeupersJan Moritz Joseph
Published in: FPL (2022)
Keyphrases
  • network on chip
  • multi processor
  • hardware implementation
  • routing algorithm
  • power dissipation
  • real time
  • data streams
  • high speed
  • data transfer
  • hardware design