Bahar Asgari

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 32

Top Topics

Matrix Multiplication

Grand Challenges

Top Venues

Publications

Donghyeon Joo, Ramyad Hadidi, Soheil Feizi, Bahar Asgari
Endor: Hardware-Friendly Sparse Format for Offloaded LLM Inference. CoRR (2024)
Sanjali Yadav, Bahar Asgari
Misam: Using ML in Dataflow Selection of Sparse-Sparse Matrix Multiplication. CoRR (2024)
Ramyad Hadidi, Jiashen Cao, Bahar Asgari, Hyesoon Kim
Creating Robust Deep Neural Networks with Coded Distributed Computing for IoT. EDGE (2023)
Foroozan Karimzadeh, Mohsen Imani, Bahar Asgari, Ningyuan Cao, Yingyan Lin, Yan Fang
Memory-Based Computing for Energy-Efficient AI: Grand Challenges. VLSI-SoC (2023)
Dheeraj Ramchandani, Bahar Asgari, Hyesoon Kim
Spica: Exploring FPGA Optimizations to Enable an Efficient SpMV Implementation for Computations at Edge. EDGE (2023)
Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim
Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. EDGE (2023)
Bahar Asgari, Dheeraj Ramchandani, Amaan Marfatia, Hyesoon Kim
Maia: Matrix Inversion Acceleration Near Memory. FPL (2022)
Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim
FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction. HPCA (2021)
Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Amaan Marfatia, Hyesoon Kim
Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. IISWC (2021)
Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim
Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. CoRR (2021)
Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware. IEEE Trans. Computers 70 (4) (2021)
Bahar Asgari, Saibal Mukhopadhyay, Sudhakar Yalamanchili
MAHASIM: Machine-Learning Hardware Acceleration Using a Software-Defined Intelligent Memory System. J. Signal Process. Syst. 93 (6) (2021)
Ramyad Hadidi, Bahar Asgari, Sam Jijina, Adriana Amyette, Nima Shoghi, Hyesoon Kim
Quantifying the design-space tradeoffs in autonomous drones. ASPLOS (2021)
Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili
ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator. HPCA (2020)
Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
MEISSA: Multiplying Matrices Efficiently in a Scalable Systolic Architecture. ICCD (2020)
Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Hyesoon Kim
Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. CoRR (2020)
Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory. DATE (2020)
Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Younmin Bae, Hyojong Kim, Michael S. Ryoo, Hyesoon Kim
Edge-Tailored Perception: Fast Inferencing in-the-Edge with Efficient Model Distribution. CoRR (2020)
Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
Proposing a Fast and Scalable Systolic Array for Matrix Multiplication. FCCM (2020)
Bahar Asgari, Ramyad Hadidi, Nima Shoghi Ghaleshahi, Hyesoon Kim
PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra. DAC (2020)
Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili
ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays. IEEE Micro 39 (5) (2019)
Ramyad Hadidi, Jiashen Cao, Yilun Xie, Bahar Asgari, Tushar Krishna, Hyesoon Kim
Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices. IISWC (2019)
Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili
LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays. DAC (2019)
Prashant J. Nair, Bahar Asgari, Moinuddin K. Qureshi
SuDoku: Tolerating High-Rate of Transient Failures for Enabling Scalable STTRAM. DSN (2019)
Younmin Bae, Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Hyesoon Kim
Capella: Customizing Perception for Edge Devices by Efficiently Allocating FPGAs to DNNs. FPL (2019)
Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim
Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. ISPASS (2018)
Bahar Asgari, Saibal Mukhopadhyay, Sudhakar Yalamanchili
Memory Slices: A Modular Building Block for Scalable, Intelligent Memory Systems. CoRR (2018)
Ramin Rajaei, Bahar Asgari, Mahmoud Tabandeh, Mahdi Fazeli
Single event multiple upset-tolerant SRAM cell designs for nano-scale CMOS technology. Turkish J. Electr. Eng. Comput. Sci. 25 (2017)
Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim
Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. CoRR (2017)
Bahar Asgari, Mahdi Fazeli, Ahmad Patooghy, Seyed Vahid Azhari
Micro-architectural approach to the efficient employment of STTRAM cells in a microprocessor register file. IET Comput. Digit. Tech. 11 (1) (2017)
Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim
Demystifying the Characteristics of 3D-Stacked Memories: A Case Study for Hybrid Memory Cube. CoRR (2017)
Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim
Demystifying the characteristics of 3D-stacked memories: A case study for Hybrid Memory Cube. IISWC (2017)