Ramin Rajaei

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 20

Top Topics

Neural Network Training

Highly Reliable

Cmos Technology

Top Venues

J. Circuits Syst. Comput.

Publications

Ahmad Patooghy, Mehdi Elahi, Maral Filvan Torkaman, Sara Sezavar Dokhtfaroughi, Ramin Rajaei
Addressing Benign and Malicious Crosstalk in Modern System-on-Chips. IEEE Access 11 (2023)
Mingdai Yang, Qiuwen Lou, Ramin Rajaei, Mohammad Reza Jokar, Junyi Qiu, Yuming Liu, Aditi Udupa, Frederic T. Chong, John M. Dallesasse, Milton Feng, Lynford L. Goddard, X. Sharon Hu, Yanjing Li
A Hybrid Optical-Electrical Analog Deep Learning Accelerator Using Incoherent Optical Signals. ACM J. Emerg. Technol. Comput. Syst. 19 (2) (2023)
Liu Liu, Ann Franchesca Laguna, Ramin Rajaei, Mohammad Mehdi Sharifi, Arman Kazemi, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu
A Reconfigurable FeFET Content Addressable Memory for Multi-State Hamming Distance. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (6) (2023)
Liu Liu, Mohammad Mehdi Sharifi, Ramin Rajaei, Arman Kazemi, Kai Ni, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu
Eva-CAM: A Circuit/Architecture-Level Evaluation Tool for General Content Addressable Memories. DATE (2022)
Mehrdad Morsali, Mohammad Hossein Moaiyeri, Ramin Rajaei
A process variation resilient spintronic true random number generator for highly reliable hardware security applications. Microelectron. J. 129 (2022)
Mohammad Mehdi Sharifi, Lillian Pentecost, Ramin Rajaei, Arman Kazemi, Qiuwen Lou, Gu-Yeon Wei, David M. Brooks, Kai Ni, X. Sharon Hu, Michael T. Niemier, Marco Donato
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. ISLPED (2021)
Arman Kazemi, Mohammad Mehdi Sharifi, Ann Franchesca Laguna, Franz Müller, Ramin Rajaei, Ricardo Olivo, Thomas Kämpfe, Michael T. Niemier, X. Sharon Hu
In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories. DATE (2021)
Ramin Rajaei, Michael T. Niemier, Xiaobo Sharon Hu
Low-Cost Sequential Logic Circuit Design Considering Single Event Double-Node Upsets and Single Event Transients. ICCD (2021)
Mohammad Mehdi Sharifi, Lillian Pentecost, Ramin Rajaei, Arman Kazemi, Qiuwen Lou, Gu-Yeon Wei, David Brooks, Kai Ni, X. Sharon Hu, Michael T. Niemier, Marco Donato
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. CoRR (2021)
Mohammad Mehdi Sharifi, Ramin Rajaei, Patsy Cadareanu, Pierre-Emmanuel Gaillardon, Yier Jin, Michael T. Niemier, Xiaobo Sharon Hu
A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks. DATE (2020)
Ramin Rajaei, Yen-Kai Lin, Sayeef S. Salahuddin, Michael T. Niemier, Xiaobo Sharon Hu
GC-eDRAM design using hybrid FinFET/NC-FinFET. ISLPED (2020)
Ramin Rajaei, Yen-Kai Lin, Sayeef S. Salahuddin, Michael T. Niemier, Xiaobo Sharon Hu
Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. ISCAS (2020)
Arman Kazemi, Ramin Rajaei, Kai Ni, Suman Datta, Michael T. Niemier, Xiaobo Sharon Hu
A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference. ISCAS (2020)
Arman Kazemi, Mohammad Mehdi Sharifi, Ann Franchesca Laguna, Franz Müller, Ramin Rajaei, Ricardo Olivo, Thomas Kämpfe, Michael T. Niemier, Xiaobo Sharon Hu
In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories. CoRR (2020)
Arman Kazemi, Ramin Rajaei, Kai Ni, Suman Datta, Michael T. Niemier, Xiaobo Sharon Hu
A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference. CoRR (2020)
Ramin Rajaei
A Reliable, Low Power and Nonvolatile MTJ-Based Flip-Flop for Advanced Nanoelectronics. J. Circuits Syst. Comput. 27 (13) (2018)
Nastaran Rajaei, Ramin Rajaei, Mahmoud Tabandeh
A soft error tolerant register file for highly reliable microprocessor design. Int. J. High Perform. Syst. Archit. 7 (3) (2017)
Ramin Rajaei, Bahar Asgari, Mahmoud Tabandeh, Mahdi Fazeli
Single event multiple upset-tolerant SRAM cell designs for nano-scale CMOS technology. Turkish J. Electr. Eng. Comput. Sci. 25 (2017)
Ramin Rajaei
Single event double node upset tolerance in MOS/spintronic sequential and combinational logic circuits. Microelectron. Reliab. 69 (2017)
Ramin Rajaei
Highly reliable and low-power magnetic full-adder designs for nanoscale technologies. Microelectron. Reliab. 73 (2017)
Ramin Rajaei, Mahmoud Tabandeh, Mahdi Fazeli
Single Event Multiple Upset (SEMU) Tolerant Latch Designs in Presence of Process and Temperature Variations. J. Circuits Syst. Comput. 24 (1) (2015)
Ramin Rajaei, Mahmoud Tabandeh, Mahdi Fazeli
Soft error rate estimation for Combinational Logic in Presence of Single Event Multiple Transients. J. Circuits Syst. Comput. 23 (6) (2014)
Ramin Rajaei, Mahmoud Tabandeh, Mahdi Fazeli
Low cost soft error hardened latch designs for nano-scale CMOS technology in presence of process variation. Microelectron. Reliab. 53 (6) (2013)
Ramin Rajaei, Mahmoud Tabandeh, Bizhan Rashidian
Single event upset immune latch circuit design using C-element. ASICON (2011)
Omid Khayat, Mohammad Mehdi Ebadzadeh, Hamid Reza Shahdoosti, Ramin Rajaei, Iman Khajehnasiri
A novel hybrid algorithm for creating self-organizing fuzzy neural networks. Neurocomputing 73 (1-3) (2009)