A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect.
Yandong LuoSourav DuttaAnkit KaulSung Kyu LimMuhannad S. BakirSuman DattaShimeng YuPublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2022)
Keyphrases
- back end
- detailed design
- low cost
- circuit design
- high speed
- power dissipation
- building blocks
- real time
- memory hierarchy
- embedded systems
- compute intensive
- low power
- user friendly
- data types
- design process
- user interface
- power consumption
- design methodology
- computer architecture
- relational databases
- power reduction
- preprocessing