Sai Pentapati

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 14

Top Topics

Physical Design

Dense Subgraphs

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Sai Pentapati, Sung Kyu Lim
Heterogeneous Monolithic 3-D IC Designs: Challenges, EDA Solutions, and Power, Performance, Cost Tradeoffs. IEEE Trans. Very Large Scale Integr. Syst. 32 (3) (2024)
Sai Pentapati, Kyungwook Chang, Sung Kyu Lim
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (4) (2024)
Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation. ACM Trans. Design Autom. Electr. Syst. 28 (4) (2023)
Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim
On Legalization of Die Bonding Bumps and Pads for 3D ICs. ISPD (2023)
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (7) (2023)
Sai Pentapati, Sung Kyu Lim
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs. ISPD (2022)
Sai Pentapati, Sung Kyu Lim
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs. IEEE Trans. Very Large Scale Integr. Syst. 30 (9) (2022)
Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks. ISPD (2021)
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISPD (2021)
Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. DATE (2020)
Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs. ISLPED (2019)
Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology. IEEE Micro 39 (6) (2019)
Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs. ISLPED (2018)