2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators.
Steven HsuAmit AgarwalMark A. AndersArnab RahaRaymond SungDeepak MathaikuttyRam KrishnamurthyJames W. TschanzVivek DePublished in: VLSI Technology and Circuits (2022)
Keyphrases
- low power
- power consumption
- high speed
- single chip
- clock frequency
- machine learning
- low cost
- power dissipation
- digital signal processing
- vlsi circuits
- logic circuits
- cmos technology
- wireless transmission
- knowledge base
- high power
- vlsi architecture
- low power consumption
- power management
- power reduction
- mixed signal
- image sensor
- power saving
- distributed video coding