An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS.
Pascal MeinerzhagenCarlos TokunagaAndres MalavasiVaibhav A. VaidyaAshwin MendonDeepak MathaikuttyJaydeep KulkarniCharles AugustineMinki ChoStephen T. KimGeorge E. MatthewRinkle JainJoseph F. RyanChung-Ching PengSomnath PaulSriram R. VangalBrando Perez EsparzaLuis CuellarMichael WoodmanBala IyerSubramaniam MaiyuranGautham N. ChinyaChris ZouYuyun LiaoKrishnan RavichandranHong WangMuhammad M. KhellahJames W. TschanzVivek DePublished in: ISSCC (2018)
Keyphrases
- fine grain
- cmos technology
- low voltage
- coarse grain
- graphics processors
- nm technology
- low power
- power consumption
- power reduction
- metal oxide semiconductor
- parallel processing
- parallel computation
- power supply
- power dissipation
- low cost
- energy efficiency
- distributed memory
- wireless sensor networks
- silicon on insulator
- nested transactions
- high speed
- image sensor
- graphics processing units
- sensor networks
- field effect transistors
- gpu implementation
- electrical properties