Gi-Joon Nam

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 26

Top Topics

Logic Synthesis

Binocular Disparity

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Chunkai Fu, Ben Trombley, Hua Xiang, Gi-Joon Nam, Jiang Hu
Machine Learning Techniques for Pre-CTS Identification of Timing Critical Flip-Flops. ISVLSI (2023)
Yuting Hu, Jiajie Li, Florian Klemme, Gi-Joon Nam, Tengfei Ma, Hussam Amrouch, Jinjun Xiong
SyncTREE: Fast Timing Analysis for Integrated Circuit Design through a Physics-informed Tree-based Graph Neural Network. NeurIPS (2023)
Tingkai Liu, Marquita Ellis, Carlos H. A. Costa, Claudia Misale, Sara Kokkila Schumacher, Jinwook Jung, Gi-Joon Nam, Volodymyr V. Kindratenko
Cloud-Bursting and Autoscaling for Python-Native Scientific Workflows Using Ray. ISC Workshops (2023)
Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu
Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Rongjian Liang, Hua Xiang, Jinwook Jung, Jiang Hu, Gi-Joon Nam
A Stochastic Approach to Handle Non-Determinism in Deep Learning-Based Design Rule Violation Predictions. ICCAD (2022)
Arjun Chaudhuri, Jonti Talukdar, Jinwook Jung, Gi-Joon Nam, Krishnendu Chakrabarty
Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks. DATE (2021)
Rongjian Liang, Jinwook Jung, Hua Xiang, Lakshmi N. Reddy, Alexey Lvov, Jiang Hu, Gi-Joon Nam
FlowTuner: A Multi-Stage EDA Flow Tuner Exploiting Parameter Knowledge Transfer. ICCAD (2021)
Siyuan Chen, Jinwook Jung, Peilin Song, Krishnendu Chakrabarty, Gi-Joon Nam
BISTLock: Efficient IP Piracy Protection using BIST. ITC (2020)
Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR (2020)
Chau-Chin Huang, Gustavo E. Téllez, Gi-Joon Nam, Yao-Wen Chang
Latch Clustering for Timing-Power Co-Optimization. DAC (2020)
Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu
DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network. ISPD (2020)
Rongjian Liang, Zhiyao Xie, Jinwook Jung, Vishnavi Chauha, Yiran Chen, Jiang Hu, Hua Xiang, Gi-Joon Nam
Routing-Free Crosstalk Prediction. ICCAD (2020)
Hua Xiang, Gi-Joon Nam, Gustavo E. Téllez, Shyam Ramji, Xiaoqing Xu
Self-Aligned Double-Patterning Aware Legalization. DATE (2020)
Ya-Chu Chang, Tung-Wei Lin, Iris Hui-Ru Jiang, Gi-Joon Nam
Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing Balancing. ISPD (2019)
Jinwook Jung, Gi-Joon Nam, Woohyun Chung, Youngsoo Shin
Integrated Latch Placement and Cloning for Timing Optimization. ACM Trans. Design Autom. Electr. Syst. 24 (2) (2019)
Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam
DATC RDF: an academic flow from logic synthesis to detailed routing. ICCAD (2018)
Alexey Lvov, Gustavo E. Téllez, Gi-Joon Nam
On Coloring and Colorability Analysis of Integrated Circuits with Triple and Quadruple Patterning Techniques. ISPD (2018)
Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej J. Ciesielski, Giovanni De Micheli
End-to-End Industrial Study of Retiming. ISVLSI (2018)
Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam
DATC RDF: An Open Design Flow from Logic Synthesis to Detailed Routing. CoRR (2018)
Jiang Hu, Ying Zhou, Yaoguang Wei, Stephen T. Quay, Lakshmi N. Reddy, Gustavo E. Téllez, Gi-Joon Nam
Interconnect Optimization Considering Multiple Critical Paths. ISPD (2018)
Mustafa Ozdal, Gi-Joon Nam, Debbie Marr
Guest Editors' Introduction: Hardware Accelerators for Data Centers. IEEE Des. Test 35 (1) (2018)
Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin
OWARU: Free Space-Aware Timing-Driven Incremental Placement With Critical Path Smoothing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (9) (2018)
Jinwook Jung, Pei-Yu Lee, Yan-Shiun Wu, Nima Karimpour Darav, Iris Hui-Ru Jiang, Victor N. Kravets, Laleh Behjat, Yih-Lang Li, Gi-Joon Nam
DATC RDF: Robust design flow database: Invited paper. ICCAD (2017)
Jinho Lee, Heesu Kim, Sungjoo Yoo, Kiyoung Choi, H. Peter Hofstee, Gi-Joon Nam, Mark Nutter, Damir A. Jamsek
ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator. Proc. VLDB Endow. 10 (12) (2017)
Jinwook Jung, Iris Hui-Ru Jiang, Gi-Joon Nam, Victor N. Kravets, Laleh Behjat, Yih-Lang Li
OpenDesign flow database: the infrastructure for VLSI design and design automation research. ICCAD (2016)
Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin
OWARU: free space-aware timing-driven incremental placement. ICCAD (2016)
Andrew B. Kahng, Mulong Luo, Gi-Joon Nam, Siddhartha Nath, David Z. Pan, Gabriel Robins
Toward Metrics of Design Automation Research Impact. ICCAD (2015)
Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (10) (2015)
Hua-Yu Chang, Iris Hui-Ru Jiang, H. Peter Hofstee, Damir A. Jamsek, Gi-Joon Nam
Feature detection for image analytics via FPGA acceleration. IBM J. Res. Dev. 59 (2/3) (2015)
Gi-Joon Nam, Sani R. Nassif
Opportunities in power distribution network system optimization: from EDA perspective. ISPD (2014)
Iris Hui-Ru Jiang, Gi-Joon Nam, Hua-Yu Chang, Sani R. Nassif, Jerry Hayes
Smart grid load balancing techniques via simultaneous switch/tie-line/wire configurations. ICCAD (2014)
Shantanu Dutt, Dinesh P. Mehta, Gi-Joon Nam
New Algorithmic Techniques for Complex EDA Problems. VLSI Design 2014 (2014)
Sani R. Nassif, Gi-Joon Nam, Jerry Hayes, Sani Fakhouri
Applying VLSI EDA to energy distribution system design. ASP-DAC (2014)
Sani R. Nassif, Gi-Joon Nam, Shayak Banerjee
Wire delay variability in nanoscale technology and its impact on physical design. ISQED (2013)
Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Gi-Joon Nam, Michael Orshansky, David Z. Pan
An accurate sparse-matrix based framework for statistical static timing analysis. Integr. 45 (4) (2012)
Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Cliff C. N. Sze, Natarajan Viswanathan, Nancy Y. Zhou
Guiding a physical design closure system to produce easier-to-route designs with more predictable timing. DAC (2012)
Charles J. Alpert, Zhuo Li, Gi-Joon Nam, Chin Ngai Sze, Natarajan Viswanathan, Samuel I. Ward
Placement: Hot or Not? ICCAD (2012)
Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin
Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. ICCAD (2011)
David A. Papa, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Natarajan Viswanathan, Gi-Joon Nam, Igor L. Markov
Physical Synthesis with Clock-Network Optimization for Large Systems on Chips. IEEE Micro 31 (4) (2011)
Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Gi-Joon Nam, Jarrod A. Roy
The ISPD-2011 routability-driven placement contest and benchmark suite. ISPD (2011)
Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy
Floorplanning challenges in early chip planning. SoCC (2011)
Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert, Yao-Wen Chang, Jarrod A. Roy, Natarajan Viswanathan
Design-hierarchy aware mixed-size placement for routability optimization. ICCAD (2010)
Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li, Gi-Joon Nam, Charles B. Winn
Detecting tangled logic structures in VLSI netlists. DAC (2010)
Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li, Charles J. Alpert, Shyam Ramji, Chris Chu
ITOP: integrating timing optimization within placement. ISPD (2010)
Charles J. Alpert, Zhuo Li, Michael D. Moffitt, Gi-Joon Nam, Jarrod A. Roy, Gustavo E. Téllez
What makes a design difficult to route. ISPD (2010)
Gi-Joon Nam, Prashant Saxena
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (2) (2010)
Taraneh Taghavi, Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Andrew D. Huber, Shyam Ramji
New placement prediction and mitigation techniques for local routing congestion. ICCAD (2010)
Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
CRISP: Congestion reduction by iterated spreading during placement. ICCAD (2009)
Cliff N. Sze, Phillip J. Restle, Gi-Joon Nam, Charles J. Alpert
Ispd2009 clock network synthesis contest. ISPD (2009)
David Z. Pan, Gi-Joon Nam
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (12) (2008)
Gi-Joon Nam, Cliff C. N. Sze, Mehmet Can Yildiz
The ISPD global routing benchmark suite. ISPD (2008)
David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. ISPD (2008)
David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (12) (2008)
Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu
RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. DAC (2007)
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han
Performance modeling for early analysis of multi-core systems. CODES+ISSS (2007)
Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
Hippocrates: First-Do-No-Harm Detailed Placement. ASP-DAC (2007)
Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
Techniques for Fast Physical Synthesis. Proc. IEEE 95 (3) (2007)
Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
The nuts and bolts of physical synthesis. SLIP (2007)
Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam
Diffusion-Based Placement Migration With Application on Legalization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (12) (2007)
Gi-Joon Nam, Mehmet Can Yildiz, David Z. Pan, Patrick H. Madden
ISPD placement contest updates and ISPD 2007 global routing contest. ISPD (2007)
Gi-Joon Nam
ISPD 2006 Placement Contest: Benchmark Suite and Results. ISPD (2006)
Gi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng
A Fast Hierarchical Quadratic Placement Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (4) (2006)
Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan
An accurate sparse matrix based framework for statistical static timing analysis. ICCAD (2006)
Charles J. Alpert, Gi-Joon Nam, Paul Villarribua, Mehmet Can Yildiz
Placement stability metrics. ASP-DAC (2005)
Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake
Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications. IEEE Trans. Very Large Scale Integr. Syst. 13 (10) (2005)
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, Sherief Reda, Paul Villarrubia
A semi-persistent clustering technique for VLSI circuit placement. ISPD (2005)
Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Bruce Winter, Mehmet Can Yildiz
The ISPD2005 placement contest and benchmark suite. ISPD (2005)
Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints. IEEE Trans. Computers 53 (6) (2004)
Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
Effective free space management for cut-based placement via analytical constraint generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (10) (2003)
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search. FPL (2002)
Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia
Free space management for cut-based placement. ICCAD (2002)
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
A new FPGA detailed routing approach via search-based Booleansatisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (6) (2002)
Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake
Two-Dimensional Position Detection System with MEMS Accelerometer for MOUSE Applications. DAC (2001)
Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar
A comparative study of two Boolean formulations of FPGA detailed routing constraints. ISPD (2001)
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
A boolean satisfiability-based incremental rerouting approach with application to FPGAs. DATE (2001)
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
Satisfiability-Based Layout Revisited: Detailed Routing of Complex FPGAs vis Search-Based Boolean SAT. FPGA (1999)
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
Satisfiability-Based Detailed FPGA Routing. VLSI Design (1999)