Debbie Marr

Publication Activity (10 Years)

Years Active: 2015-2021
Publications (10 Years): 25

Top Topics

Efficient Execution

Top Venues

Publications

Hugh Mair, Shinichiro Shiratake, Eric Karl, Thomas Burd, Jonathan Chang, Debbie Marr, Samuel Naffziger, Henk Corporaal, Ken Takeuchi, Naresh R. Shanbhag
SE1: What Technologies Will Shape the Future of Computing? ISSCC (2021)
Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil V. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. FCCM (2019)
Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil V. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu
Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI. FPGA (2019)
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only). FPGA (2018)
Asit K. Mishra, Debbie Marr
Apprentice: Using Knowledge Distillation Techniques To Improve Low-Precision Network Accuracy. ICLR (Poster) (2018)
Duncan J. M. Moss, Krishnan Srivatsan, Eriko Nurvitadhi, Piotr Ratuszniak, Chris Johnson, Jaewoong Sim, Asit K. Mishra, Debbie Marr, Suchit Subhaschandra, Philip Heng Wai Leong
A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study. FPGA (2018)
Asit K. Mishra, Eriko Nurvitadhi, Jeffrey J. Cook, Debbie Marr
WRPN: Wide Reduced-Precision Networks. ICLR (Poster) (2018)
Asit K. Mishra, Debbie Marr
WRPN & Apprentice: Methods for Training and Inference using Low-Precision Numerics. CoRR (2018)
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC. FPL (2018)
Mustafa Ozdal, Gi-Joon Nam, Debbie Marr
Guest Editors' Introduction: Hardware Accelerators for Data Centers. IEEE Des. Test 35 (1) (2018)
Asit K. Mishra, Eriko Nurvitadhi, Ganesh Venkatesh, Jonathan Pearce, Debbie Marr
Fine-grained accelerators for sparse machine learning workloads. ASP-DAC (2017)
Asit K. Mishra, Jeffrey J. Cook, Eriko Nurvitadhi, Debbie Marr
WRPN: Training and Inference using Wide Reduced-Precision Networks. CoRR (2017)
Duncan J. M. Moss, Eriko Nurvitadhi, Jaewoong Sim, Asit K. Mishra, Debbie Marr, Suchit Subhaschandra, Philip Heng Wai Leong
High performance binary neural networks on the Xeon+FPGA™ platform. FPL (2017)
Supriya Kapur, Asit K. Mishra, Debbie Marr
Low Precision RNNs: Quantizing RNNs Without Losing Accuracy. CoRR (2017)
Asit K. Mishra, Debbie Marr
Apprentice: Using Knowledge Distillation Techniques To Improve Low-Precision Network Accuracy. CoRR (2017)
Ganesh Venkatesh, Eriko Nurvitadhi, Debbie Marr
Accelerating Deep Convolutional Networks using low-precision and sparsity. ICASSP (2017)
Eriko Nurvitadhi, Ganesh Venkatesh, Jaewoong Sim, Debbie Marr, Randy Huang, Jason Ong Gee Hock, Yeong Tat Liew, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra, Guy Boudoukh
Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks? FPGA (2017)
Asit K. Mishra, Eriko Nurvitadhi, Jeffrey J. Cook, Debbie Marr
WRPN: Wide Reduced-Precision Networks. CoRR (2017)
Jack Yinger, Eriko Nurvitadhi, Davor Capalija, Andrew C. Ling, Debbie Marr, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra
Customizable FPGA OpenCL matrix multiply design template for deep neural networks. FPT (2017)
Milad Hashemi, Debbie Marr, Doug Carmean, Yale N. Patt
Efficient Execution of Bursty Applications. IEEE Comput. Archit. Lett. 15 (2) (2016)
Eriko Nurvitadhi, David Sheffield, Jaewoong Sim, Asit K. Mishra, Ganesh Venkatesh, Debbie Marr
Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU, and ASIC. FPT (2016)
Ganesh Venkatesh, Eriko Nurvitadhi, Debbie Marr
Accelerating Deep Convolutional Networks using low-precision and sparsity. CoRR (2016)
Eriko Nurvitadhi, Jaewoong Sim, David Sheffield, Asit K. Mishra, Krishnan Srivatsan, Debbie Marr
Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC. FPL (2016)
Eriko Nurvitadhi, Asit K. Mishra, Yu Wang, Ganesh Venkatesh, Debbie Marr
Hardware accelerator for analytics of sparse data. DATE (2016)
Eriko Nurvitadhi, Asit K. Mishra, Debbie Marr
A sparse matrix vector multiply accelerator for support vector machine. CASES (2015)