Naresh R. Shanbhag

ORCID

Publication Activity (10 Years)

Years Active: 1991-2024
Publications (10 Years): 77

Top Venues

CoRR

ICASSP

ISCAS

IEEE J. Solid State Circuits

Publications

Hyungyo Kim, Naresh R. Shanbhag
Enhancing the Accuracy of 6T SRAM-Based In-Memory Architecture via Maximum Likelihood Detection. IEEE Trans. Signal Process. 72 (2024)
Wangxin He, Jian Meng, Sujan Kumar Gonugondla, Shimeng Yu, Naresh R. Shanbhag, Jae-sun Seo
PRIVE: Efficient RRAM Programming with Chip Verification for RRAM-based In-Memory Computing Acceleration. DATE (2023)
Han-Mo Ou, Naresh R. Shanbhag
Enhancing the Accuracy of Resistive In-Memory Architectures using Adaptive Signal Processing. ICASSP (2023)
Hassan Dbouk, Naresh R. Shanbhag
On the Robustness of Randomized Ensembles to Adversarial Perturbations. CoRR (2023)
Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation. ESSCIRC (2023)
Hassan Dbouk, Naresh R. Shanbhag
On the Robustness of Randomized Ensembles to Adversarial Perturbations. ICML (2023)
Hyungyo Kim, Naresh R. Shanbhag
Boosting the Accuracy of SRAM-Based in-Memory Architectures Via Maximum Likelihood-Based Error Compensation Method. ICASSP (2023)
Naresh R. Shanbhag, Saion K. Roy
Comprehending In-memory Computing Trends via Proper Benchmarking. CICC (2022)
Sujan K. Gonugondla, Charbel Sakr, Hassan Dbouk, Naresh R. Shanbhag
Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Sujan Kumar Gonugondla, Naresh R. Shanbhag
IMPQ: Reduced Complexity Neural Networks Via Granular Precision Assignment. ICASSP (2022)
Hassan Dbouk, Naresh R. Shanbhag
Adversarial Vulnerability of Randomized Ensembles. CoRR (2022)
Hassan Dbouk, Naresh R. Shanbhag
Adversarial Vulnerability of Randomized Ensembles. ICML (2022)
Klara Nahrstedt, Naresh R. Shanbhag, Vikram S. Adve, Nancy M. Amato, Romit Roy Choudhury, Carl A. Gunter, Nam Sung Kim, Olgica Milenkovic, Sayan Mitra, Lav R. Varshney, Yurii Vlasov, Sarita V. Adve, Rashid Bashir, Andreas Cangellaris, James DiCarlo, Katie Driggs Campbell, Nick Feamster, Mattia Gazzola, Karrie Karahalios, Sanmi Koyejo, Paul Kwiat, Bo Li, Negar Mehr, Ravish Mehra, Andrew Miller, Daniela Rus, Alexander G. Schwing, Anshumali Shrivastava
Coordinated Science Laboratory 70th Anniversary Symposium: The Future of Computing. CoRR (2022)
Saion K. Roy, Ameya Patil, Naresh R. Shanbhag
Fundamental Limits on the Computational Accuracy of Resistive Crossbar-based In-memory Architectures. ISCAS (2022)
Hassan Dbouk, Naresh R. Shanbhag
Generalized Depthwise-Separable Convolutions for Adversarially Robust and Efficient Neural Networks. NeurIPS (2021)
Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
Optimizing Selective Protection for CNN Resilience. ISSRE (2021)
Hassan Dbouk, Naresh R. Shanbhag
Generalized Depthwise-Separable Convolutions for Adversarially Robust and Efficient Neural Networks. CoRR (2021)
Charbel Sakr, Naresh R. Shanbhag
Signal Processing Methods to Enhance the Energy Efficiency of In-Memory Computing Architectures. IEEE Trans. Signal Process. 69 (2021)
Hassan Dbouk, Sujan K. Gonugondla, Charbel Sakr, Naresh R. Shanbhag
A 0.44-μJ/dec, 39.9-μs/dec, Recurrent Attention In-Memory Processor for Keyword Spotting. IEEE J. Solid State Circuits 56 (7) (2021)
Hugh Mair, Shinichiro Shiratake, Eric Karl, Thomas Burd, Jonathan Chang, Debbie Marr, Samuel Naffziger, Henk Corporaal, Ken Takeuchi, Naresh R. Shanbhag
SE1: What Technologies Will Shape the Future of Computing? ISSCC (2021)
Ameya D. Patil, Michael Tuttle, Alexander G. Schwing, Naresh R. Shanbhag
Adversarial Training to the Union of Perturbation Models. CoRR (2021)
Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
HarDNN: Feature Map Vulnerability Evaluation in CNNs. CoRR (2020)
Mingu Kang, Sujan K. Gonugondla, Naresh R. Shanbhag
Deep In-Memory Architectures in SRAM: An Analog Approach to Approximate Computing. Proc. IEEE 108 (12) (2020)
Sujan K. Gonugondla, Ameya D. Patil, Naresh R. Shanbhag
SWIPE: Enhancing Robustness of ReRAM Crossbars for In-memory Computing. ICCAD (2020)
Mingu Kang, Yongjune Kim, Ameya D. Patil, Naresh R. Shanbhag
Deep In-Memory Architectures for Machine Learning-Accuracy Versus Efficiency Trade-Offs. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (5) (2020)
Randy Bryant, Mark D. Hill, Tom Kazior, Daniel Lee, Jie Liu, Klara Nahrstedt, Vijay Narayanan, Jan M. Rabaey, Hava T. Siegelmann, Naresh R. Shanbhag, Naveen Verma, H.-S. Philip Wong
Nanotechnology-inspired Information Processing Systems of the Future. CoRR (2020)
Hassan Dbouk, Sujan K. Gonugondla, Charbel Sakr, Naresh R. Shanbhag
KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting. CICC (2020)
Hassan Dbouk, Hetul Sanghvi, Mahesh Mehendale, Naresh R. Shanbhag
DBQ: A Differentiable Branch Quantizer for Lightweight Deep Neural Networks. CoRR (2020)
Sujan K. Gonugondla, Charbel Sakr, Hassan Dbouk, Naresh R. Shanbhag
Fundamental Limits on the Precision of In-memory Architectures. ICCAD (2020)
Hassan Dbouk, Hetul Sanghvi, Mahesh Mehendale, Naresh R. Shanbhag
DBQ: A Differentiable Branch Quantizer for Lightweight Deep Neural Networks. ECCV (27) (2020)
Hassan Dbouk, Hanfei Geng, Craig M. Vineyard, Naresh R. Shanbhag
Low-Complexity Fixed-Point Convolutional Neural Networks For Automatic Target Recognition. ICASSP (2020)
Sujan Kumar Gonugondla, Charbel Sakr, Hassan Dbouk, Naresh R. Shanbhag
Fundamental Limits on Energy-Delay-Accuracy of In-memory Architectures in Inference Applications. CoRR (2020)
Charbel Sakr, Naigang Wang, Chia-Yu Chen, Jungwook Choi, Ankur Agrawal, Naresh R. Shanbhag, Kailash Gopalakrishnan
Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks. CoRR (2019)
Ameya D. Patil, Haocheng Hua, Sujan K. Gonugondla, Mingu Kang, Naresh R. Shanbhag
An MRAM-Based Deep In-Memory Architecture for Deep Neural Networks. ISCAS (2019)
Charbel Sakr, Yongjune Kim, Naresh R. Shanbhag
Minimum Precision Requirements of General Margin Hyperplane Classifiers. IEEE J. Emerg. Sel. Topics Circuits Syst. 9 (2) (2019)
Naresh R. Shanbhag, Naveen Verma, Yongjune Kim, Ameya D. Patil, Lav R. Varshney
Shannon-Inspired Statistical Computing for the Nanoscale Era. Proc. IEEE 107 (1) (2019)
Charbel Sakr, Naresh R. Shanbhag
Per-Tensor Fixed-Point Quantization of the Back-Propagation Algorithm. ICLR (Poster) (2019)
Mingu Kang, Prakalp Srivastava, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag
An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms. IEEE Micro 39 (5) (2019)
Yongjune Kim, Ravi Kiran Raman, Young-Sik Kim, Lav R. Varshney, Naresh R. Shanbhag
Efficient Local Secret Sharing for Distributed Blockchain Systems. IEEE Commun. Lett. 23 (2) (2019)
Ameya D. Patil, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Naresh R. Shanbhag
An Energy-Efficient Classifier via Boosted Spin Channel Networks. ISCAS (2019)
Charbel Sakr, Naigang Wang, Chia-Yu Chen, Jungwook Choi, Ankur Agrawal, Naresh R. Shanbhag, Kailash Gopalakrishnan
Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks. ICLR (Poster) (2019)
Yingyan Lin, Sai Zhang, Naresh R. Shanbhag
A Rank Decomposed Statistical Error Compensation Technique for Robust Convolutional Neural Networks in the Near Threshold Voltage Regime. J. Signal Process. Syst. 90 (10) (2018)
Sujan Kumar Gonugondla, Mingu Kang, Naresh R. Shanbhag
A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training. ISSCC (2018)
Sujan K. Gonugondla, Mingu Kang, Naresh R. Shanbhag
A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training. IEEE J. Solid State Circuits 53 (11) (2018)
Charbel Sakr, Naresh R. Shanbhag
An Analytical Method to Determine Minimum Per-Layer Precision of Deep Neural Networks. ICASSP (2018)
Charbel Sakr, Jungwook Choi, Zhuo Wang, Kailash Gopalakrishnan, Naresh R. Shanbhag
True Gradient-Based Training of Deep Binary Activated Neural Networks Via Continuous Binarization. ICASSP (2018)
Sujan K. Gonugondla, Mingu Kang, Yongjune Kim, Mark Helm, Sean Eilert, Naresh R. Shanbhag
Energy-Efficient Deep In-memory Architecture for NAND Flash Memories. ISCAS (2018)
Yongjune Kim, Mingu Kang, Lav R. Varshney, Naresh R. Shanbhag
Generalized Water-Filling for Source-Aware Energy-Efficient SRAMs. IEEE Trans. Commun. 66 (10) (2018)
Yongjune Kim, Mingu Kang, Lav R. Varshney, Naresh R. Shanbhag
SRAM Bit-line Swings Optimization using Generalized Waterfilling. ISIT (2018)
Mingu Kang, Sungmin Lim, Sujan K. Gonugondla, Naresh R. Shanbhag
An In-Memory VLSI Architecture for Convolutional Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (3) (2018)
Mingu Kang, Sujan K. Gonugondla, Ameya Patil, Naresh R. Shanbhag
A Multi-Functional In-Memory Inference Processor Using a Standard 6T SRAM Array. IEEE J. Solid State Circuits 53 (2) (2018)
Prakalp Srivastava, Mingu Kang, Sujan K. Gonugondla, Sungmin Lim, Jungwook Choi, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag
PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms. ISCA (2018)
Charbel Sakr, Naresh R. Shanbhag
Per-Tensor Fixed-Point Quantization of the Back-Propagation Algorithm. CoRR (2018)
Charbel Sakr, Naresh R. Shanbhag
Minimum Precision Requirements for Deep Learning with Biomedical Datasets. BioCAS (2018)
Mingu Kang, Sujan K. Gonugondla, Sungmin Lim, Naresh R. Shanbhag
A 19.4-nJ/Decision, 364-K Decisions/s, In-Memory Random Forest Multi-Class Inference Accelerator. IEEE J. Solid State Circuits 53 (7) (2018)
Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited. DAC (2017)
Ameya D. Patil, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Naresh R. Shanbhag
Shannon-inspired Statistical Computing to Enable Spintronics. CoRR (2017)
Charbel Sakr, Yongjune Kim, Naresh R. Shanbhag
Analytical Guarantees on Numerical Precision of Deep Neural Networks. ICML (2017)
Charbel Sakr, Ameya D. Patil, Sai Zhang, Yongjune Kim, Naresh R. Shanbhag
Minimum precision requirements for the SVM-SGD learning algorithm. ICASSP (2017)
Mingu Kang, Sujan K. Gonugondla, Naresh R. Shanbhag
A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM array. ESSCIRC (2017)
Yingyan Lin, Charbel Sakr, Yongjune Kim, Naresh R. Shanbhag
PredictiveNet: An energy-efficient convolutional neural network via zero prediction. ISCAS (2017)
Aseem Wadhwa, Upamanyu Madhow, Naresh R. Shanbhag
Slicer Architectures for Analog-to-Information Conversion in Channel Equalizers. IEEE Trans. Commun. 65 (3) (2017)
Yongjune Kim, Mingu Kang, Lav R. Varshney, Naresh R. Shanbhag
Generalized Water-filling for Source-Aware Energy-Efficient SRAMs. CoRR (2017)
Jungwook Choi, Ameya D. Patil, Rob A. Rutenbar, Naresh R. Shanbhag
Analysis of error resiliency of belief propagation in computer vision. ICASSP (2016)
Eric P. Kim, Jungwook Choi, Naresh R. Shanbhag, Rob A. Rutenbar
Error Resilient and Energy Efficient MRF Message-Passing-Based Stereo Matching. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Yingyan Lin, Min-Sun Keel, Adam C. Faust, Aolin Xu, Naresh R. Shanbhag, Elyse Rosenbaum, Andrew C. Singer
A Study of BER-Optimal ADC-Based Receiver for Serial Links. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2016)
Charbel Sakr, Ameya Patil, Sai Zhang, Naresh R. Shanbhag
Understanding the Energy and Precision Requirements for Online Learning. CoRR (2016)
Sai Zhang, Naresh R. Shanbhag
Embedded Algorithmic Noise-Tolerance for Signal Processing and Machine Learning Systems via Data Path Decomposition. IEEE Trans. Signal Process. 64 (13) (2016)
Sai Zhang, Naresh R. Shanbhag
Error-Resilient Machine Learning in Near Threshold Voltage via Classifier Ensemble. CoRR (2016)
Yingyan Lin, Sai Zhang, Naresh R. Shanbhag
Variation-Tolerant Architectures for Convolutional Neural Networks in the Near Threshold Voltage Regime. SiPS (2016)
Mingu Kang, Naresh R. Shanbhag
In-Memory Computing Architectures for Sparse Distributed Memory. IEEE Trans. Biomed. Circuits Syst. 10 (4) (2016)
Naresh R. Shanbhag
Energy-efficient Machine Learning in Silicon: A Communications-inspired Approach. CoRR (2016)
Sai Zhang, Mingu Kang, Charbel Sakr, Naresh R. Shanbhag
Reducing the Energy Cost of Inference via In-sensor Information Processing. CoRR (2016)
Rami A. Abdallah, Naresh R. Shanbhag
Correction to "An Energy-Efficient ECG Processor in 45-nm CMOS Using Statistical Error Compensation". IEEE J. Solid State Circuits 51 (6) (2016)
Sujan K. Gonugondla, Byonghyo Shim, Naresh R. Shanbhag
Perfect error compensation via algorithmic error cancellation. ICASSP (2016)
Mingu Kang, Sujan K. Gonugondla, Ameya Patil, Naresh R. Shanbhag
A 481pJ/decision 3.4M decision/s Multifunctional Deep In-memory Inference Processor using Standard 6T SRAM Array. CoRR (2016)
Sai Zhang, Naresh R. Shanbhag
Probabilistic Error Models for machine learning kernels implemented on stochastic nanoscale fabrics. DATE (2016)
Mingu Kang, Sujan K. Gonugondla, Min-Sun Keel, Naresh R. Shanbhag
An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks. ICASSP (2015)
Eric P. Kim, Daniel J. Baker, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones
A 3.6-mW 50-MHz PN Code Acquisition Filter via Statistical Error Compensation in 180-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 23 (3) (2015)
Mingu Kang, Eric P. Kim, Min-Sun Keel, Naresh R. Shanbhag
Energy-efficient and high throughput sparse distributed memory architecture. ISCAS (2015)
Sai Zhang, Naresh R. Shanbhag
Reduced Overhead Error Compensation for Energy Efficient Machine Learning Kernels. ICCAD (2015)
Naresh R. Shanbhag
Statistical information processing: Computing for the nanoscale era. ISLPED (2015)
Mingu Kong, Min-Sun Keel, Naresh R. Shanbhag, Sean Eilert, Ken Curewitz
An energy-efficient VLSI architecture for pattern recognition via deep embedding of computation in SRAM. ICASSP (2014)
Sai Zhang, Naresh R. Shanbhag, Philip T. Krein
Computing. IEEE Trans. Circuits Syst. II Express Briefs (9) (2014)
Eric P. Kim, Jungwook Choi, Naresh R. Shanbhag, Rob A. Rutenbar
A robust message passing based stereo matching kernel via system-level error resiliency. ICASSP (2014)
Ihab Nahlus, Eric P. Kim, Naresh R. Shanbhag, David T. Blaauw
Energy-efficient dot product computation using a switched analog circuit architecture. ISLPED (2014)
Aseem Wadhwa, Upamanyu Madhow, Naresh R. Shanbhag
Space-time slicer architectures for analog-to-information conversion in channel equalizers. ICC (2014)
Rami A. Abdallah, Naresh R. Shanbhag
Reducing Energy at the Minimum Energy Operating Point Via Statistical Error Compensation. IEEE Trans. Very Large Scale Integr. Syst. 22 (6) (2014)
Eric P. Kim, Naresh R. Shanbhag
Energy-efficient accelerator architecture for stereo image matching using approximate computing and statistical error compensation. GlobalSIP (2014)
Sai Zhang, Jane S. Tu, Naresh R. Shanbhag, Philip T. Krein
A 0.79 pJ/K-Gate, 83% Efficient Unified Core and Voltage Regulator Architecture for Sub/Near-Threshold Operation in 130 nm CMOS. IEEE J. Solid State Circuits 49 (11) (2014)
Sai Zhang, Naresh R. Shanbhag
Embedded error compensation for energy efficient DSP systems. GlobalSIP (2014)
Eric P. Kim, Naresh R. Shanbhag
Statistical analysis of algorithmic noise tolerance. ICASSP (2013)
Rami A. Abdallah, Naresh R. Shanbhag
Error-resilient systems via statistical signal processing. SiPS (2013)
Jungwook Choi, Eric P. Kim, Rob A. Rutenbar, Naresh R. Shanbhag
Error resilient MRF message passing architecture for stereo matching. SiPS (2013)
Rami A. Abdallah, Naresh R. Shanbhag
An Energy-Efficient ECG Processor in 45-nm CMOS Using Statistical Error Compensation. IEEE J. Solid State Circuits 48 (11) (2013)
Rami A. Abdallah, Naresh R. Shanbhag
Robust and Energy Efficient Multimedia Systems via Likelihood Processing. IEEE Trans. Multim. 15 (2) (2013)
Aadithya V. Karthik, Yingyan Lin, Chenjie Gu, Aolin Xu, Jaijeet S. Roychowdhury, Naresh R. Shanbhag
A fully automated technique for constructing FSM abstractions of non-ideal latches in communication systems. ICASSP (2012)
Peter Kairouz, Aolin Xu, Naresh R. Shanbhag, Andrew C. Singer
A sphere decoding approach for the vector Viterbi algorithm. ACSCC (2012)
Rajan Narasimha, Minwei Lu, Naresh R. Shanbhag, Andrew C. Singer
BER-Optimal Analog-to-Digital Converters for Communication Links. IEEE Trans. Signal Process. 60 (7) (2012)
Adam C. Faust, Rajan Narasimha, Karan S. Bhatia, Ankit Srivastava, Chhay Kong, Hyeon-Min Bae, Elyse Rosenbaum, Naresh R. Shanbhag
FEC-based 4 Gb/s backplane transceiver in 90nm CMOS. CICC (2012)

Naresh R. Shanbhag.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Naresh R. Shanbhag