Christopher W. Fletcher

ORCID

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 81

Top Venues

CoRR

ASPLOS

MICRO

IACR Cryptol. ePrint Arch.

Massachusetts Institute of Technology, Cambridge, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, USA

PHD

Publications

Nandeeka Nayak, Toluwanimi O. Odemuyiwa, Shubham Ugare, Christopher W. Fletcher, Michael Pellauer, Joel S. Emer
TeAAL: A Declarative Framework for Modeling Sparse Tensor Accelerators. CoRR (2023)
Yingchen Wang, Riccardo Paccagnella, Elizabeth Tang He, Hovav Shacham, Christopher W. Fletcher, David Kohlbrenner
Hertzbleed: Turning Power Side-Channel Attacks Into Remote Timing Attacks on x86. IEEE Micro 43 (4) (2023)
Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, Josep Torrellas
Untangle: A Principled Framework to Design Low-Leakage, High-Performance Dynamic Partitioning Schemes. ASPLOS (3) (2023)
Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher
Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling. ASPLOS (3) (2023)
Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher
Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract). HOPC@SPAA (2023)
Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Philipp Schmitz, Sayak Ray, Jason M. Fung, Christopher W. Fletcher, Dominik Stoffel, Wolfgang Kunz
Secure-by-Construction Design Methodology for CPUs: Implementing Secure Speculation on the RTL. ICCAD (2023)
Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher
Declassiflow: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures. CCS (2023)
Nandeeka Nayak, Toluwanimi O. Odemuyiwa, Shubham Ugare, Christopher W. Fletcher, Michael Pellauer, Joel S. Emer
TeAAL: A Declarative Framework for Modeling Sparse Tensor Accelerators. MICRO (2023)
Yingchen Wang, Riccardo Paccagnella, Alan Wandke, Zhao Gang, Grant Garrett-Grossman, Christopher W. Fletcher, David Kohlbrenner, Hovav Shacham
DVFS Frequently Leaks Secrets: Hertzbleed Attacks Beyond SIKE, Cryptography, and CPU-Only Data. SP (2023)
Jiyong Yu, Aishani Dutta, Trent Jaeger, David Kohlbrenner, Christopher W. Fletcher
Synchronization Storage Channels (S2C): Timer-less Cache Side-Channel Attacks on the Apple M1 via Hardware Synchronization Instructions. USENIX Security Symposium (2023)
Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher
DECLASSIFLOW: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures (Full Version). CoRR (2023)
Yingchen Wang, Riccardo Paccagnella, Elizabeth Tang He, Hovav Shacham, Christopher W. Fletcher, David Kohlbrenner
Hertzbleed: Turning Power Side-Channel Attacks Into Remote Timing Attacks on x86. USENIX Security Symposium (2022)
Jiyong Yu, Xinyang Ge, Trent Jaeger, Christopher W. Fletcher, Weidong Cui
Pagoda: Towards Binary Code Privacy Protection with SGX-based Execute-Only Memory. SEED (2022)
Zhangxiaowen Gong, Houxiang Ji, Yao Yao, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
Graphite: optimizing graph neural networks on CPUs through cooperative software-hardware techniques. ISCA (2022)
Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, Josep Torrellas
Binoculars: Contention-Based Side-Channel Attacks Exploiting the Page Walker. USENIX Security Symposium (2022)
Sushant Dinesh, Grant Garrett-Grossman, Christopher W. Fletcher
SynthCT: Towards Portable Constant-Time Code. NDSS (2022)
Jose Rodrigo Sanchez Vicarte, Michael Flanders, Riccardo Paccagnella, Grant Garrett-Grossman, Adam Morrison, Christopher W. Fletcher, David Kohlbrenner
Augury: Using Data Memory-Dependent Prefetchers to Leak Data at Rest. IEEE Symposium on Security and Privacy (2022)
Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos Rozas, Adam Morrison, Frank McKeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, Alaa R. Alameldeen
Speculative interference attacks: breaking invisible speculation schemes. ASPLOS (2021)
Riccardo Paccagnella, Licheng Luo, Christopher W. Fletcher
Lord of the Ring(s): Side Channel Attacks on the CPU On-Chip Ring Interconnect Are Practical. USENIX Security Symposium (2021)
Gururaj Saileshwar, Christopher W. Fletcher, Moinuddin K. Qureshi
Streamline: a fast, flushless cache covert-channel attack by enabling asynchronous collusion. ASPLOS (2021)
Jose Rodrigo Sanchez Vicarte, Pradyumna Shome, Nandeeka Nayak, Caroline Trippel, Adam Morrison, David Kohlbrenner, Christopher W. Fletcher
Opening Pandora's Box: A Systematic Study of New Ways Microarchitecture Can Leak Private Data. ISCA (2021)
Rohan Baskar Prabhakar, Sachit Kuhar, Rohit Agrawal, Christopher J. Hughes, Christopher W. Fletcher
SumMerge: an efficient algorithm and implementation for weight repetition-aware DNN inference. ICS (2021)
Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
Optimizing Selective Protection for CNN Resilience. ISSRE (2021)
Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher
Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search. CoRR (2021)
Riccardo Paccagnella, Licheng Luo, Christopher W. Fletcher
Lord of the Ring(s): Side Channel Attacks on the CPU On-Chip Ring Interconnect Are Practical. CoRR (2021)
Vikram Sharma Mailthody, James Wei, Nicholas Chen, Mohammad Behnia, Ruihao Yao, Qihao Wang, Vedant Agrawal, Churan He, Lijian Wang, Leihao Chen, Amit Agarwal, Edward Richter, Wen-Mei Hwu, Christopher W. Fletcher, Jinjun Xiong, Andrew Miller, Sanjay Patel
Safer Illinois and RokWall: Privacy Preserving University Health Apps for COVID-19. CoRR (2021)
Jiyong Yu, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, Christopher W. Fletcher
Speculative taint tracking (STT): a comprehensive protection for speculatively accessed data. Commun. ACM 64 (12) (2021)
Jose Rodrigo Sanchez Vicarte, Gang Wang, Christopher W. Fletcher
Double-Cross Attacks: Subverting Active Learning Systems. USENIX Security Symposium (2021)
Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher
Mind mappings: enabling efficient algorithm-accelerator mapping space search. ASPLOS (2021)
Po-An Tsai, Andres Sanchez, Christopher W. Fletcher, Daniel Sánchez
Leaking Secrets Through Compressed Caches. IEEE Micro 41 (3) (2021)
Dimitrios Skarlatos, Zirui Neil Zhao, Riccardo Paccagnella, Christopher W. Fletcher, Josep Torrellas
Jamais vu: thwarting microarchitectural replay attacks. ASPLOS (2021)
Hyun Bin Lee, Tushar M. Jois, Christopher W. Fletcher, Carl A. Gunter
DOVE: A Data-Oblivious Virtual Environment. NDSS (2021)
Rutvik Choudhary, Jiyong Yu, Christopher W. Fletcher, Adam Morrison
Speculative Privacy Tracking (SPT): Leaking Information From Speculative Execution Without Compromising Privacy. MICRO (2021)
Hyun Bin Lee, Tushar M. Jois, Christopher W. Fletcher, Carl A. Gunter
DOVE: A Data-Oblivious Virtual Environment. CoRR (2021)
Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
HarDNN: Feature Map Vulnerability Evaluation in CNNs. CoRR (2020)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
SparseTrain: Leveraging Dynamic Sparsity in Software for Training DNNs on General-Purpose SIMD Processors. PACT (2020)
Sandeep Dasgupta, Sushant Dinesh, Deepan Venkatesh, Vikram S. Adve, Christopher W. Fletcher
Scalable validation of binary lifters. PLDI (2020)
Dimitrios Skarlatos, Mengjia Yan, Bhargava Gopireddy, Read Sprabery, Josep Torrellas, Christopher W. Fletcher
MicroScope: Enabling Microarchitectural Replay Attacks. IEEE Micro 40 (3) (2020)
Mengjia Yan, Christopher W. Fletcher, Josep Torrellas
Cache Telepathy: Leveraging Shared Resource Attacks to Learn DNN Architectures. USENIX Security Symposium (2020)
Jiyong Yu, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, Christopher W. Fletcher
Speculative Taint Tracking (STT): A Comprehensive Protection for Speculatively Accessed Data. IEEE Micro 40 (3) (2020)
Abdulrahman Mahmoud, Neeraj Aggarwal, Alex Nobbe, Jose Rodrigo Sanchez Vicarte, Sarita V. Adve, Christopher W. Fletcher, Iuri Frosio, Siva Kumar Sastry Hari
PyTorchFI: A Runtime Perturbation Tool for DNNs. DSN Workshops (2020)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Sara Baghsorkhi, Josep Torrellas
SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs. MICRO (2020)
Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
A Retrospective on Path ORAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (8) (2020)
Jiyong Yu, Namrata Mantri, Josep Torrellas, Adam Morrison, Christopher W. Fletcher
Speculative Data-Oblivious Execution: Mobilizing Safe Prediction For Safe and Efficient Speculative Execution. ISCA (2020)
Jose Rodrigo Sanchez Vicarte, Benjamin Schreiber, Riccardo Paccagnella, Christopher W. Fletcher
Game of Threads: Enabling Asynchronous Poisoning Attacks. ASPLOS (2020)
Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos V. Rozas, Adam Morrison, Frank McKeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, Alaa R. Alameldeen
Speculative Interference Attacks: Breaking Invisible Speculation Schemes. CoRR (2020)
Riccardo Paccagnella, Pubali Datta, Wajih Ul Hassan, Adam Bates, Christopher W. Fletcher, Andrew Miller, Dave Tian
Custos: Practical Tamper-Evident Auditing of Operating Systems Using Trusted Execution. NDSS (2020)
Zirui Neil Zhao, Houxiang Ji, Mengjia Yan, Jiyong Yu, Christopher W. Fletcher, Adam Morrison, Darko Marinov, Josep Torrellas
Speculation Invariance (InvarSpec): Faster Safe Execution Through Program Analysis. MICRO (2020)
Jiyong Yu, Lucas Hsiung, Mohamad El Hajj, Christopher W. Fletcher
Creating Foundations for Secure Microarchitectures With Data-Oblivious ISA Extensions. IEEE Micro 40 (3) (2020)
Po-An Tsai, Andres Sanchez, Christopher W. Fletcher, Daniel Sánchez
Safecracker: Leaking Secrets through Compressed Caches. ASPLOS (2020)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
SparseTrain: Leveraging Dynamic Sparsity in Training DNNs on General-Purpose SIMD Processors. CoRR (2019)
Radha Venkatagiri, Khalique Ahmed, Abdulrahman Mahmoud, Sasa Misailovic, Darko Marinov, Christopher W. Fletcher, Sarita V. Adve
gem5-Approxilyzer: An Open-Source Tool for Application-Level Soft Error Analysis. DSN (2019)
Dimitrios Skarlatos, Mengjia Yan, Bhargava Gopireddy, Read Sprabery, Josep Torrellas, Christopher W. Fletcher
MicroScope: enabling microarchitectural replay attacks. ISCA (2019)
Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
Design and Implementation of the Ascend Secure Processor. IEEE Trans. Dependable Secur. Comput. 16 (2) (2019)
Mengjia Yan, Jen-Yang Wen, Christopher W. Fletcher, Josep Torrellas
SecDir: a secure directory to defeat directory side-channel attacks. ISCA (2019)
Abdulrahman Mahmoud, Radha Venkatagiri, Khalique Ahmed, Sasa Misailovic, Darko Marinov, Christopher W. Fletcher, Sarita V. Adve
Minotaur: Adapting Software Testing Techniques for Hardware Errors. ASPLOS (2019)
Jiyong Yu, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, Christopher W. Fletcher
Speculative Taint Tracking (STT): A Comprehensive Protection for Speculatively Accessed Data. MICRO (2019)
Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W. Fletcher, Josep Torrellas
InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy (Corrigendum). MICRO (2019)
Jiyong Yu, Lucas Hsiung, Mohamad El Hajj, Christopher W. Fletcher
Data Oblivious ISA Extensions for Side Channel-Resistant and High Performance Computing. NDSS (2019)
Kartik Hegde, Hadi Asghari Moghaddam, Michael Pellauer, Neal Clayton Crago, Aamer Jaleel, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher
ExTensor: An Accelerator for Sparse Tensor Algebra. MICRO (2019)
Mengjia Yan, Read Sprabery, Bhargava Gopireddy, Christopher W. Fletcher, Roy H. Campbell, Josep Torrellas
Attack Directories, Not Caches: Side Channel Attacks in a Non-Inclusive World. IEEE Symposium on Security and Privacy (2019)
Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer
Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration. ASPLOS (2019)
Kartik Hegde, Jiyong Yu, Rohit Agrawal, Mengjia Yan, Michael Pellauer, Christopher W. Fletcher
UCNN: Exploiting Computational Reuse in Deep Neural Networks via Weight Repetition. ISCA (2018)
Mengjia Yan, Christopher W. Fletcher, Josep Torrellas
Cache Telepathy: Leveraging Shared Resource Attacks to Learn DNN Architectures. CoRR (2018)
Kartik Hegde, Jiyong Yu, Rohit Agrawal, Mengjia Yan, Michael Pellauer, Christopher W. Fletcher
UCNN: Exploiting Computational Reuse in Deep Neural Networks via Weight Repetition. CoRR (2018)
Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W. Fletcher, Josep Torrellas
InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy. MICRO (2018)
Emil Stefanov, Marten van Dijk, Elaine Shi, T.-H. Hubert Chan, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
Path ORAM: An Extremely Simple Oblivious RAM Protocol. J. ACM 65 (4) (2018)
Jiyong Yu, Lucas Hsiung, Mohamad El Hajj, Christopher W. Fletcher
Data Oblivious ISA Extensions for Side Channel-Resistant and High Performance Computing. IACR Cryptol. ePrint Arch. 2018 (2018)
Kartik Hegde, Rohit Agrawal, Yulun Yao, Christopher W. Fletcher
Morph: Flexible Acceleration for 3D CNN-Based Video Understanding. MICRO (2018)
Sajin Sasy, Sergey Gorbunov, Christopher W. Fletcher
ZeroTrace : Oblivious Memory Primitives from Intel SGX. NDSS (2018)
Kartik Hegde, Rohit Agrawal, Yulun Yao, Christopher W. Fletcher
Morph: Flexible Acceleration for 3D CNN-based Video Understanding. CoRR (2018)
Ittai Abraham, Christopher W. Fletcher, Kartik Nayak, Benny Pinkas, Ling Ren
Asymptotically Tight Bounds for Composing ORAM with PIR. Public Key Cryptography (1) (2017)
Kartik Nayak, Christopher W. Fletcher, Ling Ren, Nishanth Chandran, Satya V. Lokam, Elaine Shi, Vipul Goyal
HOP: Hardware makes Obfuscation Practical. NDSS (2017)
Sajin Sasy, Sergey Gorbunov, Christopher W. Fletcher
ZeroTrace : Oblivious Memory Primitives from Intel SGX. IACR Cryptol. ePrint Arch. 2017 (2017)
Srinivas Devadas, Marten van Dijk, Christopher W. Fletcher, Ling Ren, Elaine Shi, Daniel Wichs
Onion ORAM: A Constant Bandwidth Blowup Oblivious RAM. TCC (A2) (2016)
Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Srinivas Devadas
Freecursive ORAM: [Nearly] Free Recursion and Integrity Verification for Position-based Oblivious RAM. ASPLOS (2015)
Ling Ren, Christopher W. Fletcher, Albert Kwon, Emil Stefanov, Elaine Shi, Marten van Dijk, Srinivas Devadas
Constants Count: Practical Improvements to Oblivious RAM. USENIX Security Symposium (2015)
Srinivas Devadas, Marten van Dijk, Christopher W. Fletcher, Ling Ren
Onion ORAM: A Constant Bandwidth and Constant Client Storage ORAM (without FHE or SWHE). IACR Cryptol. ePrint Arch. 2015 (2015)
Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Emil Stefanov, Dimitrios N. Serpanos, Srinivas Devadas
A Low-Latency, Low-Area Hardware Oblivious RAM Controller. FCCM (2015)
Xiangyao Yu, Syed Kamran Haider, Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
PrORAM: dynamic prefetcher for oblivious RAM. ISCA (2015)
Christopher W. Fletcher, Muhammad Naveed, Ling Ren, Elaine Shi, Emil Stefanov
Bucket ORAM: Single Online Roundtrip, Constant Bandwidth Oblivious RAM. IACR Cryptol. ePrint Arch. 2015 (2015)
G. Edward Suh, Christopher W. Fletcher, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
Author retrospective AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS 25th Anniversary (2014)
Ling Ren, Christopher W. Fletcher, Xiangyao Yu, Albert Kwon, Marten van Dijk, Srinivas Devadas
Unified Oblivious-RAM: Improving Recursive ORAM with Locality and Pseudorandomness. IACR Cryptol. ePrint Arch. 2014 (2014)
Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Marten van Dijk, Omer Khan, Srinivas Devadas
Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs. HPCA (2014)
Ling Ren, Christopher W. Fletcher, Albert Kwon, Emil Stefanov, Elaine Shi, Marten van Dijk, Srinivas Devadas
Ring ORAM: Closing the Gap Between Small and Large Client Storage Oblivious RAM. IACR Cryptol. ePrint Arch. 2014 (2014)
Xiangyao Yu, Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
Enhancing Oblivious RAM Performance Using Dynamic Prefetching. IACR Cryptol. ePrint Arch. 2014 (2014)
Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Emil Stefanov, Srinivas Devadas
RAW Path ORAM: A Low-Latency, Low-Area Hardware ORAM Controller with Integrity Verification. IACR Cryptol. ePrint Arch. 2014 (2014)
Christopher W. Fletcher, Rachael Harding, Omer Khan, Srinivas Devadas
A framework to accelerate sequential programs on homogeneous multicores. VLSI-SoC (2013)
Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
Path ORAM: an extremely simple oblivious RAM protocol. CCS (2013)
Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
Path ORAM: An Extremely Simple Oblivious RAM Protocol. IACR Cryptol. ePrint Arch. 2013 (2013)
Xiangyao Yu, Christopher W. Fletcher, Ling Ren, Marten van Dijk, Srinivas Devadas
Generalized external interaction with tamper-resistant hardware with bounded information leakage. CCSW (2013)
Ling Ren, Xiangyao Yu, Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
Design space exploration and optimization of path oblivious RAM in secure processors. ISCA (2013)
Ling Ren, Christopher W. Fletcher, Xiangyao Yu, Marten van Dijk, Srinivas Devadas
Integrity verification for path Oblivious-RAM. HPEC (2013)
Ling Ren, Xiangyao Yu, Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
Design Space Exploration and Optimization of Path Oblivious RAM in Secure Processors. IACR Cryptol. ePrint Arch. 2013 (2013)
Christopher W. Fletcher, Rachael Harding, Omer Khan, Srinivas Devadas
A low-overhead dynamic optimization framework for multicores. PACT (2012)
Ilia A. Lebedev, Christopher W. Fletcher, Shaoyi Cheng, James C. Martin, Austin Doupnik, Daniel Burke, Mingjie Lin, John Wawrzynek
Exploring Many-Core Design Templates for FPGAs and ASICs. Int. J. Reconfigurable Comput. 2012 (2012)
Pengju Ren, Mieszko Lis, Myong Hyon Cho, Keun Sup Shim, Christopher W. Fletcher, Omer Khan, Nanning Zheng, Srinivas Devadas
HORNET: A Cycle-Level Multicore Simulator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (6) (2012)
Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
Towards an interpreter for efficient encrypted computation. CCSW (2012)
Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
Compilation Techniques for Efficient Encrypted Computation. IACR Cryptol. ePrint Arch. 2012 (2012)
Mieszko Lis, Pengju Ren, Myong Hyon Cho, Keun Sup Shim, Christopher W. Fletcher, Omer Khan, Srinivas Devadas
Scalable, accurate multicore simulation in the 1000-core era. ISPASS (2011)

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Publication Activity (10 Years)

Top Topics

Top Venues

Christopher W. Fletcher