Gururaj Saileshwar

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 27

Top Topics

Spatial Correlation

Management Policies

Countermeasures

Internal Memory

Top Venues

Publications

Aamer Jaleel, Gururaj Saileshwar, Stephen W. Keckler, Moinuddin K. Qureshi
PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers. ISCA (2024)
Aamer Jaleel, Stephen W. Keckler, Gururaj Saileshwar
Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation. CoRR (2024)
Jeonghyun Woo, Gururaj Saileshwar, Prashant J. Nair
Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems. HPCA (2023)
Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, Tushar Krishna
Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping. IEEE Comput. Archit. Lett. 22 (1) (2023)
Gururaj Saileshwar, Moinuddin K. Qureshi
The Mirage of Breaking MIRAGE: Analyzing the Modeling Pitfalls in Emerging "Attacks" on MIRAGE. IEEE Comput. Archit. Lett. 22 (2) (2023)
Anish Saxena, Gururaj Saileshwar, Jonas Juffinger, Andreas Kogler, Daniel Gruss, Moinuddin K. Qureshi
PT-Guard: Integrity-Protected Page Tables to Defend Against Breakthrough Rowhammer Attacks. DSN (2023)
Stefan Gast, Jonas Juffinger, Martin Schwarzl, Gururaj Saileshwar, Andreas Kogler, Simone Franza, Markus Köstl, Daniel Gruss
SQUIP: Exploiting the Scheduler Queue Contention Side Channel. SP (2023)
Gururaj Saileshwar, Moinuddin K. Qureshi
The Mirage of Breaking MIRAGE: Refuting the HPCA-2023 Paper "Are Randomized Caches Truly Random?". CoRR (2023)
Martin Schwarzl, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz, Daniel Gruss
Practical Timing Side-Channel Attacks on Memory Compression. SP (2023)
Gururaj Saileshwar, Bolin Wang, Moinuddin K. Qureshi, Prashant J. Nair
Randomized row-swap: mitigating Row Hammer by breaking spatial correlation between aggressor and victim rows. ASPLOS (2022)
Jeonghyun Woo, Gururaj Saileshwar, Prashant J. Nair
Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems. CoRR (2022)
Gururaj Saileshwar, Rick Boivie, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu
HeapCheck: Low-cost Hardware Support for Memory Safety. ACM Trans. Archit. Code Optim. 19 (1) (2022)
Moinuddin K. Qureshi, Aditya Rohan, Gururaj Saileshwar, Prashant J. Nair
Hydra: enabling low-overhead mitigation of row-hammer at ultra-low thresholds via hybrid tracking. ISCA (2022)
Rick Boivie, Gururaj Saileshwar, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu
On the Scalability of HeapCheck. DSN (Supplements) (2022)
Anish Saxena, Gururaj Saileshwar, Prashant J. Nair, Moinuddin K. Qureshi
AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime. MICRO (2022)
Gururaj Saileshwar, Christopher W. Fletcher, Moinuddin K. Qureshi
Streamline: a fast, flushless cache covert-channel attack by enabling asynchronous collusion. ASPLOS (2021)
Gururaj Saileshwar, Moinuddin K. Qureshi
MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design. USENIX Security Symposium (2021)
Ren Ding, Yonghae Kim, Fan Sang, Wen Xu, Gururaj Saileshwar, Taesoo Kim
Hardware Support to Improve Fuzzing Performance and Precision. CCS (2021)
Gururaj Saileshwar, Sanjay Kariyappa, Moinuddin K. Qureshi
Bespoke Cache Enclaves: Fine-Grained and Scalable Isolation from Cache Side-Channels via Flexible Set-Partitioning. SEED (2021)
Rick Boivie, Gururaj Saileshwar, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu
Hardware Support for Low-Cost Memory Safety. DSN (Supplements) (2021)
Elba Garza, Gururaj Saileshwar, Udit Gupta, Tianyi Liu, Abdulrahman Mahmoud, Saugata Ghose, Joel Emer
Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future. WCAE (2021)
Martin Schwarz, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz, Daniel Gruss
Practical Timing Side Channel Attacks on Memory Compression. CoRR (2021)
Gururaj Saileshwar, Moinuddin K. Qureshi
MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design. CoRR (2020)
Gururaj Saileshwar, Moinuddin K. Qureshi
CleanupSpec: An "Undo" Approach to Safe Speculation. MICRO (2019)
Gururaj Saileshwar, Moinuddin K. Qureshi
Lookout for Zombies: Mitigating Flush+Reload Attack on Shared Caches by Monitoring Invalidated Lines. CoRR (2019)
Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, José A. Joao, Moinuddin K. Qureshi
Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories. MICRO (2018)
Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, Moinuddin K. Qureshi
SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories. HPCA (2018)
Priyanka Kabara, Sanket Thakur, Gururaj Saileshwar, Maryam Shojaei Baghini, Dinesh Kumar Sharma
CMOS low-noise signal conditioning with a novel differential "resistance to frequency" converter for resistive sensor applications. ISOCC (2011)