Dominik Stoffel

ORCID

Publication Activity (10 Years)

Years Active: 1997-2023
Publications (10 Years): 51

Top Venues

Goethe University Frankfurt, Frankfurt am Main, Germany (PHD)

Education History

Goethe University Frankfurt, Frankfurt am Main, Germany

PHD

Publications

Philipp Schmitz, Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Thore Tiemann, Jonah Heller, Thomas Eisenbarth, Dominik Stoffel, Wolfgang Kunz
Okapi: A Lightweight Architecture for Secure Speculation Exploiting Locality of Memory Accesses. CoRR (2023)
Lucas Deutschmann, Johannes Müller, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz
A Scalable Formal Verification Methodology for Data-Oblivious Hardware. CoRR (2023)
Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. IEEE Trans. Computers 72 (1) (2023)
Anna Lena Duque Antón, Johannes Müller, Lucas Deutschmann, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz
A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators. CoRR (2023)
Philipp Schmitz, Johannes Mueller, Christian Bartsch, Dominik Stoffel, Wolfgang Kunz
UPEC-PN: Exhaustive constant time verification of low-level software using property checking. MBMV (2023)
Anna Lena Duque Antón, Johannes Müller, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz
Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation. IEEE Access 11 (2023)
Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Philipp Schmitz, Sayak Ray, Jason M. Fung, Christopher W. Fletcher, Dominik Stoffel, Wolfgang Kunz
Secure-by-Construction Design Methodology for CPUs: Implementing Secure Speculation on the RTL. ICCAD (2023)
Johannes Müller, Anna Lena Duque Antón, Lucas Deutschmann, Dino Mehmedagic, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz
A New Security Threat in MCUs - SoC-wide timing side channels and how to find them. CoRR (2023)
Dino Mehmedagic, Mohammad Rahmani Fadiheh, Johannes Müller, Anna Lena Duque Antón, Dominik Stoffel, Wolfgang Kunz
Design of Access Control Mechanisms in Systems-on-Chip with Formal Integrity Guarantees. USENIX Security Symposium (2023)
Stian Gerlach Sørensen, Christian Bartsch, Dominik Stoffel, Wolfgang Kunz
Generation of Formal CPU Profiles for Embedded Systems. VLSI-SoC (2022)
Lucas Deutschmann, Johannes Müller, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz
Towards a formally verified hardware root-of-trust for data-oblivious computing. DAC (2022)
Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. VLSI-SoC (2022)
Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
A Framework for Formal Verification of DRAM Controllers. CoRR (2022)
Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
A Framework for Formal Verification of DRAM Controllers. MEMSYS (2022)
Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. VLSI-SoC (2022)
Christian Bartsch, Stephan Wilhelm, Daniel Kästner, Dominik Stoffel, Wolfgang Kunz
Compositional Fault Propagation Analysis in Embedded Systems using Abstract Interpretation. MBMV (2022)
Endri Kaja, Nicolas Gerlin, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
MetaFS: Model-driven Fault Simulation Framework. DFT (2022)
Johannes Müller, Mohammad Rahmani Fadiheh, Anna Lena Duque Antón, Thomas Eisenbarth, Dominik Stoffel, Wolfgang Kunz
A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level. DAC (2021)
Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. CoRR (2021)
Christian Bartsch, Stephan Wilhelm, Daniel Kästner, Dominik Stoffel, Wolfgang Kunz
Compositional Fault Propagation Analysis in Embedded Systems using Abstract Interpretation. ITC (2021)
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki, Eshan Singh, Mohammad Rahmani Fadiheh, Wolfgang Kunz, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection. CoRR (2021)
Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz
Generation of Abstract Driver Models for IP Integration Verification. IEEE Trans. Emerg. Top. Comput. 8 (4) (2020)
Thomas Fehmel, Viet-Tan Nguyen, Dominik Stoffel, Wolfgang Kunz
Automatic State Space Analysis for Modeling Untrusted Embedded Device Drivers. DSD (2020)
M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz
Efficient binary-level coverage analysis. ESEC/SIGSOFT FSE (2020)
Mohammad Rahmani Fadiheh, Johannes Müller, Raik Brinkmann, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz
A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors. DAC (2020)
M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz
Efficient Binary-Level Coverage Analysis. CoRR (2020)
Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz
QED and Property Generation. DATE (2020)
Tobias Ludwig, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Properties First - Correct-By-Construction RTL Design in System-Level Design Flows. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. DATE (2019)
Vladimir Herdt, Daniel Große, Rolf Drechsler, Christoph Gerum, Alexander Jung, Joscha Benz, Oliver Bringmann, Michael Schwarz, Dominik Stoffel, Wolfgang Kunz
. FDL (2019)
Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking. DATE (2019)
Michael Schwarz, Raphael Stahl, Daniel Müller-Gritschneder, Ulf Schlichtmann, Dominik Stoffel, Wolfgang Kunz
ACCESS: HW/SW Co-Equivalence Checking for Firmware Optimization. DAC (2019)
Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Exploiting Hardware Unobservability for Low-Power Design and Safety Analysis in Formal Verification-Driven Design Flows. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. CoRR (2019)
Michael Schwarz, Dominik Stoffel, Wolfgang Kunz
ACCESS: HW/SW-Co-Equivalence Checking for Firmware Optimization. MBMV (2019)
Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking. CoRR (2018)
Mohammad Rahmani Fadiheh, Joakim Urdahl, Srinivasa Shashank Nuthakki, Subhasish Mitra, Clark W. Barrett, Dominik Stoffel, Wolfgang Kunz
Symbolic quick error detection using symbolic initial state for pre-silicon verification. DATE (2018)
Michael Schwarz, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
Cycle-accurate software modeling for RTL verification of embedded systems. DDECS (2017)
Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Dynamic Power Optimization Based on Formal Property Checking of Operations. VLSI Design (2017)
M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz
goSAT: Floating-point satisfiability as global optimization. FMCAD (2017)
Christian Bartsch, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
A HW/SW Cross-Layer Approach for Determining Application-Redundant Hardware Faults in Embedded Systems. J. Electron. Test. 33 (1) (2017)
M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz
Speculative disassembly of binary code. MBMV (2017)
Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Dynamic Power Optimization based on Formal Property Checking of Operations. MBMV (2017)
Christian Bartsch, Nico Rödel, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
A HW-dependent software model for cross-layer fault analysis in embedded systems. LATS (2016)
Christian Bartsch, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
Safety across the HW/SW interface - Can formal methods meet the challenge? ISIC (2016)
Christian Bartsch, Nico Rödel, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
A HW-dependent Software Model for Cross-Layer Fault Analysis in Embedded Systems. MBMV (2016)
M. Ammar Ben Khadra, Dominik Stoffel, Wolfgang Kunz
Speculative disassembly of binary code. CASES (2016)
Oliver Marx, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz
A computer-algebraic approach to formal verification of data-centric low-level software. MEMOCODE (2016)
Joakim Urdahl, Shrinidhi Udupi, Tobias Ludwig, Dominik Stoffel, Wolfgang Kunz
Properties first? a new design methodology for hardware, and its perspectives in safety analysis. ICCAD (2016)
Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Architectural system modeling for correct-by-construction RTL design. FDL (2015)
Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Architectural System Modeling for Correct-by-Construction RTL Design. MBMV (2015)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Coverage of compositional property sets under reactive constraints. ISQED (2014)
Carlos Villarraga, Bernard Schmidt, Binghao Bao, Rakesh Raman, Christian Bartsch, Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz
Software in a hardware view: New models for HW-dependent software in SoC verification and test. ITC (2014)
Wolfgang Kunz, Dominik Stoffel, Joakim Urdahl
T4B: Formal verification in system-on-chip design: Scientific foundations and practical methodology. SoCC (2014)
Binghao Bao, Carlos Villarraga, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz
A property language for the specification of hardware-dependent embedded system software. FDL (2014)
Christian Bartsch, Carlos Villarraga, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz
Efficient SAT/simulation-based model generation for low-level embedded software. MBMV (2014)
Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz
Path Predicate Abstraction for Sound System-Level Models of RT-Level Circuit Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (2) (2014)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Compositional Completeness over reactive Constraints. MBMV (2013)
Joakim Urdahl, Shrinidhi Udupi, Dominik Stoffel, Wolfgang Kunz
Formal system-on-chip verification: An operation-based methodology and its perspectives in low power design. PATMOS (2013)
Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer
Proof Logging for Computer Algebra based SMT Solving. MBMV (2013)
Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Jörg Bormann, Markus Wedler, Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz
A New Formal Verification Approach for Hardware-dependent Embedded System Software. IPSJ Trans. Syst. LSI Des. Methodol. 6 (2013)
Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann
A Hardware-Dependent Model for SAT-based Verification of Interrupt-Driven Low-level Embedded System Software. MBMV (2013)
Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer
Proof logging for computer algebra based SMT solving. ICCAD (2013)
Bernard Schmidt, Carlos Villarraga, Jörg Bormann, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
A computational model for SAT-based verification of hardware-dependent low-level embedded system software. ASP-DAC (2013)
Carlos Villarraga, Bernard Schmidt, Jörg Bormann, Christian Bartsch, Dominik Stoffel, Wolfgang Kunz
An equivalence checker for hardware-dependent embedded system software. MEMOCODE (2013)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal plausibility checks for environment constraints. FDL (2012)
Joakim Urdahl, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
System verification of concurrent RTL modules by compositional path predicate abstraction. DAC (2012)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal Plausibility Checks for Environment Constraints. FDL (Selected Papers) (2012)
Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal hardware/software co-verification by interval property checking with abstraction. DAC (2011)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel
STABLE: A new QF-BV SMT Solver for hard Verification Problems combining Boolean Reasoning with Computer Algebra. MBMV (2011)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel
STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra. DATE (2011)
Minh D. Nguyen, Markus Wedler, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz
Formal Hardware/Software Co-Verification by Interval Property Checking with Abstraction. MBMV (2011)
Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz
-step induction to compute invariants for SAT-based property checking. DAC (2010)
Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz
Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL (2010)
Joakim Urdahl, Dominik Stoffel, Jörg Bormann, Markus Wedler, Wolfgang Kunz
Path predicate abstraction by complete interval property checking. FMCAD (2010)
Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Analyzing k-step induction to compute invariants for SAT-based property checking. MBMV (2010)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann
A re-use methodology for formal SoC protocol compliance verification. FDL (2009)
Markus Wedler, Evgeny Pavlenko, Alexander Dreyer, Frank Seelisch, Dominik Stoffel, Gert-Martin Greuel, Wolfgang Kunz
Solving hard instances in QF-BV combining Boolean reasoning with computer algebra. Algorithms and Applications for Next Generation SAT Solvers (2009)
Dominik Stoffel
Formal Verification of Systems-on-Chip - Industrial Experiences and Scientific Perspectives. DEXA Workshops (2009)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
A Re-Use Methodology for SoC Protocol Compliance Verification. MBMV (2009)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. MBMV (2008)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. FDL (2008)
Oliver Wienand, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Gert-Martin Greuel
An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths. CAV (2008)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Jörg Bormann, Dominik Stoffel, Wolfgang Kunz
Unbounded Protocol Compliance Verification Using Interval Property Checking With Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (11) (2008)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level. FDL (Selected Papers) (2008)
Markus Wedler, Dominik Stoffel, Raik Brinkmann, Wolfgang Kunz
A Normalization Method for Arithmetic Data-Path Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (11) (2007)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Arithmetic Constraints in SAT-based Property Checking. MBMV (2007)
Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
Transition-by-transition FSM traversal for reachability analysis in bounded model checking. ICCAD (2005)
Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz
Enhancing BMC-based Protocol Verification Using Transition-By-Transition FSM Traversal. GI Jahrestagung (1) (2005)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Normalization at the arithmetic bit level. DAC (2005)
Dominik Stoffel, Markus Wedler, Peter Warkentin, Wolfgang Kunz
Structural FSM traversal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (5) (2004)
Dominik Stoffel, Wolfgang Kunz
Equivalence checking of arithmetic circuits on the arithmetic bit level. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (5) (2004)
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor. DATE (2004)
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Michel R. C. M. Berkelaar, Wolfgang Kunz
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning. ICCD (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Arithmetic Reasoning in DPLL-Based SAT Solving. DATE (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Exploiting state encoding for invariant generation in induction-based property checking. ASP-DAC (2004)
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Michel R. C. M. Berkelaar, Wolfgang Kunz
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning. MBMV (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Towards the impact of state encoding on induction-based property checking. MBMV (2003)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Using RTL Statespace Information and State Encoding for Induction Based Property Checking. DATE (2003)
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey
Cost-efficient Formal Block Verification for ASIC Design. MBMV (2003)

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Publication Activity (10 Years)

Top Topics

Top Venues

Dominik Stoffel