Karthik Ganesan

Publication Activity (10 Years)

Years Active: 2007-2021
Publications (10 Years): 19

Top Topics

Java Virtual Machine

Fundamental Limits

Top Venues

Allerton Conference

Publications

Karthik Ganesan, Pakhi Bamdev, Jaivarsan B, Amresh Venugopal, Abhinav Tushar
N-Best ASR Transformer: Enhancing SLU Performance using Multiple ASR Hypotheses. CoRR (2021)
Karthik Ganesan, Pakhi Bamdev, Jaivarsan B, Amresh Venugopal, Abhinav Tushar
N-Best ASR Transformer: Enhancing SLU Performance using Multiple ASR Hypotheses. ACL/IJCNLP (2) (2021)
Alex Noel Joseph Raj, Haipeng Zhu, Asiya Khan, Zhemin Zhuang, Zengbiao Yang, Vijayalakshmi G. V. Mahesh, Karthik Ganesan
ADID-UNET - a segmentation model for COVID-19 infection from lung CT scans. PeerJ Comput. Sci. 7 (2021)
Siddhant Arora, Siddharth Dalmia, Pavel Denisov, Xuankai Chang, Yushi Ueda, Yifan Peng, Yuekai Zhang, Sujay Kumar, Karthik Ganesan, Brian Yan, Ngoc Thang Vu, Alan W. Black, Shinji Watanabe
ESPnet-SLU: Advancing Spoken Language Understanding through ESPnet. CoRR (2021)
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki, Eshan Singh, Mohammad Rahmani Fadiheh, Wolfgang Kunz, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection. CoRR (2021)
Rachna Pathak, Shalu Agrawal, Rishiraj Adhikary, Nipun Batra, Karthik Ganesan
Impact of COVID19 lockdown on household energy consumption on two Indian cities: poster abstract. SenSys (2020)
Karthik Ganesan, Thomas A. Flores, Binh Q. Le, Dante G. Muratore, Neal Patel, Subhasish Mitra, Boris Murmann, Daniel Palanker
Sensory Particles with Optical Telemetry. ISCAS (2020)
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. DATE (2019)
Florian Lonsing, Karthik Ganesan, Makai Mann, Srinivasa Shashank Nuthakki, Eshan Singh, Mario Srouji, Yahan Yang, Subhasish Mitra, Clark W. Barrett
Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper. ICCAD (2019)
Karthik Ganesan, Joshua San Miguel, Natalie D. Enright Jerger
The What's Next Intermittent Computing Architecture. HPCA (2019)
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. CoRR (2019)
Georges G. E. Gielen, Nektar Xama, Karthik Ganesan, Subhasish Mitra
Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs. DATE (2019)
Joshua San Miguel, Karthik Ganesan, Mario Badr, Natalie D. Enright Jerger
The EH Model: Analytical Exploration of Energy-Harvesting Architectures. IEEE Comput. Archit. Lett. 17 (1) (2018)
Greg Malysa, Mikel Hernaez, Idoia Ochoa, Milind Rao, Karthik Ganesan, Tsachy Weissman
QVZ: lossy compression of quality values. Bioinform. 34 (1) (2018)
Joshua San Miguel, Karthik Ganesan, Mario Badr, Chunqiu Xia, Rose Li, Hsuan Hsiao, Natalie D. Enright Jerger
The EH Model: Early Design Space Exploration of Intermittent Processor Architectures. MICRO (2018)
Karthik Ganesan, Ahmed Khawaja, Luyang Wang, Shrinivas Joshi, Michelle Szucs, Melina Demertzi, Yao-Min Chen
Accelerating Java Streams With A Data AnalyticsHardware Accelerator. ICPE (2017)
Andy Gean Ye, Karthik Ganesan
Measuring the Power-Constrained Performance and Energy Gap between FPGAs and Processors (Abstract Only). FPGA (2017)
Karthik Ganesan, Pulkit Grover, Jan M. Rabaey, Andrea Goldsmith
On the Total Power Capacity of Regular-LDPC Codes With Iterative Message-Passing Decoders. IEEE J. Sel. Areas Commun. 34 (2) (2016)
Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (4) (2016)
Jee Ho Ryoo, Karthik Ganesan, Yao-Min Chen, Lizy Kurian John
i-MIRROR: A Software Managed Die-Stacked DRAM-Based Memory Subsystem. SBAC-PAD (2015)
Greg Malysa, Mikel Hernaez, Idoia Ochoa, Milind Rao, Karthik Ganesan, Tsachy Weissman
QVZ: lossy compression of quality values. Bioinform. 31 (19) (2015)
Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. CoRR (2015)
Karthik Ganesan, Pulkit Grover, Jan M. Rabaey, Andrea J. Goldsmith
Towards Approaching Total-Power-Capacity: Transmit and Decoding Power Minimization for LDPC Codes. CoRR (2015)
Karthik Ganesan, Yao-Min Chen, Xiaochen Pan
Scaling Java Virtual Machine on a many-core system. ISIC (2014)
Karthik Ganesan, Lizy Kurian John
Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors. IEEE Trans. Computers 63 (4) (2014)
Karthik Ganesan, Pulkit Grover, Andrea Goldsmith
How far are LDPC codes from fundamental limits on total power consumption? Allerton Conference (2012)
Karthik Ganesan, Yang Wen, Pulkit Grover, Andrea Goldsmith, Jan M. Rabaey
Choosing "green" codes by simulation-based modeling of implementations. GLOBECOM (2012)
Karthik Ganesan, Pulkit Grover, Jan M. Rabaey
The power cost of over-designing codes. SiPS (2011)
Karthik Ganesan, Lizy K. John
MAximum Multicore POwer (MAMPO): an automatic multithreaded synthetic power virus generation framework for multicore systems. SC (2011)
Pulkit Grover, Anant Sahai, Karthik Ganesan, Jan M. Rabaey
"Green codes with short wires at the decoder: Fundamental limits and constructions". ITA (2011)
Karthik Ganesan, Jungho Jo, Lizy K. John
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads. ISPASS (2010)
Karthik Ganesan, Jungho Jo, William Lloyd Bircher, Dimitris Kaseridis, Zhibin Yu, Lizy K. John
System-level max power (SYMPO): a systematic approach for escalating system-level power consumption using synthetic benchmarks. PACT (2010)
Karthik Ganesan, Deepak Panwar, Lizy K. John
Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory and TLB Characteristics. SPEC Benchmark Workshop (2009)
Nagarajan Venkateswaran, Vinoth Krishnan Elangovan, Karthik Ganesan, T. R. S. Sagar, S. Aananthakrishanan, S. Ramalingam, Shyamsundar Gopalakrishnan, Madhavan Manivannan, Deepak Srinivasan, Viswanath Krishnamurthy, Karthik Chandrasekar, Viswanath Venkatesan, Balaji Subramaniam, V. Sangkar, Aravind Vasudevan, Shrikanth Ganapathy, Sriram Murali, M. Thyagarajan
On the concept of simultaneous execution of multiple applications on hierarchically based cluster and the silicon operating system. IPDPS (2008)
Valentina Salapura, Karthik Ganesan, Alan Gara, Michael Gschwind, James C. Sexton, Robert Walkup
Next-Generation Performance Counters: Towards Monitoring Over Thousand Concurrent Events. ISPASS (2008)
Karthik Ganesan, Lizy Kurian John, Valentina Salapura, James C. Sexton
A Performance Counter Based Workload Characterization on Blue Gene/P. ICPP (2008)
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Arvind M, Prem Kumar Ramesh, Karthik Ganesan, Viswanath Krishnamurthy, Sivaramakrishnan
Future generation supercomputers II: a paradigm for cluster architecture. SIGARCH Comput. Archit. News 35 (5) (2007)