Nagarajan Venkateswaran

Publication Activity (10 Years)

Years Active: 2004-2013
Publications (10 Years): 0

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Publications

Nagarajan Venkateswaran, Kartik Lakshminarasimhan, Akash Sridhar, Prashanth Thinakaran, Rajagopal Hariharan, Vinesh Srinivasan, Ram Srivatsa Kannan, Aswin Sridharan
Performance and energy efficient cache system design: Simultaneous execution of multiple applications on heterogeneous cores. ISVLSI (2013)
Nagarajan Venkateswaran, Vinesh Srinivasan, Ram Srivatsa Kannan, Prashanth Thinakaran, Rajagopal Hariharan, Bharanidharan Vasudevan, Nachiappan Chidambaram Nachiappan, Karthikeyan P. Saravanan, Aswin Sridharan, Vigneshwaran Sankaran, Vignesh Adhinarayanan, V. S. Vignesh, Ravindhiran Mukundrajan
Compilation Accelerator on Silicon. ISVLSI (2012)
Nagarajan Venkateswaran, Rajagopal Hariharan, Vinesh Srinivasan, Ram Srivatsa Kannan, Prashanth Thinakaran, Vigneshwaran Sankaran, Bharanidharan Vasudevan, Ravindhiran Mukundrajan, Nachiappan Chidambaram Nachiappan, Aswin Sridharan, Karthikeyan P. Saravanan, Vignesh Adhinarayanan, Vignesh Veppur Sankaranarayanan
SCOC IP Cores for Custom Built Supercomputing Nodes. ISVLSI (2012)
Nagarajan Venkateswaran, Karthikeyan P. Saravanan, Nachiappan Chidambaram Nachiappan, Aravind Vasudevan, Balaji Subramaniam, Ravindhiran Mukundrajan
Custom Built Heterogeneous Multi-core Architectures (CUBEMACH): Breaking the conventions. IPDPS Workshops (2010)
Nagarajan Venkateswaran, Ravindhiran Mukundrajan, Mrigank Sharma, Badrinarayanan Ravi
A Non-Uniform Grid Based Ground Plane Model for High Performance Nodes: The Impact of Heterogeneous Cores on Ground Voltage Gradient. ISVLSI (2009)
Nagarajan Venkateswaran, Aravind Vasudevan, Balaji Subramaniam, Ravindhiran Mukundrajan, T. P. Ramnath Sai Sagar, Madhavan Manivannan, Sriram Murali, Vinoth Krishnan Elangovan
Towards modeling and integrated design automation of supercomputing clusters (MIDAS). Comput. Sci. Res. Dev. 24 (1-2) (2009)
Nagarajan Venkateswaran, Karthik Chandrasekar, Shrikanth Ganapathy
Design for Testability of Functional Cores in High Performance Node Architectures. DELTA (2008)
Nagarajan Venkateswaran, Vinoth Krishnan Elangovan, Karthik Ganesan, T. R. S. Sagar, S. Aananthakrishanan, S. Ramalingam, Shyamsundar Gopalakrishnan, Madhavan Manivannan, Deepak Srinivasan, Viswanath Krishnamurthy, Karthik Chandrasekar, Viswanath Venkatesan, Balaji Subramaniam, V. Sangkar, Aravind Vasudevan, Shrikanth Ganapathy, Sriram Murali, M. Thyagarajan
On the concept of simultaneous execution of multiple applications on hierarchically based cluster and the silicon operating system. IPDPS (2008)
Nagarajan Venkateswaran, Arjun Kumeresh, Harish Chandran
DNA Based Evolutionary Approach for Microprocessor Design Automation. ICANNGA (1) (2007)
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan
Future generation supercomputers I: a paradigm for node architecture. SIGARCH Comput. Archit. News 35 (5) (2007)
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Arvind M, Prem Kumar Ramesh, Karthik Ganesan, Viswanath Krishnamurthy, Sivaramakrishnan
Future generation supercomputers II: a paradigm for cluster architecture. SIGARCH Comput. Archit. News 35 (5) (2007)
Arrvindh Shriraman, Nagarajan Venkateswaran, Niranjan Soundararajan
PASCOM: Power Model for Supercomputers. ARCS (2006)
Nagarajan Venkateswaran, Arrvindh Shriraman, Niranjan Soundararajan
Memory In Processor-Supercomputer On a Chip: Processor Design and Execution Semantics for Massive Single-Chip Performance. IPDPS (2005)
Nagarajan Venkateswaran, Aditya Krishnan, S. Niranjan Kumar, Arrvindh Shriraman, Srinivas Sridharan
Memory in processor: a novel design paradigm for supercomputing architectures. SIGARCH Comput. Archit. News 32 (3) (2004)