Markus Wedler

Publication Activity (10 Years)

Years Active: 2002-2015
Publications (10 Years): 1

Top Topics

Formal Verification

Computer Algebra

Hardware Platforms

Top Venues

Publications

Robert Lajos Bücs, Luis Gabriel Murillo, Ekaterina Korotcenko, Gaurav Dugge, Rainer Leupers, Gerd Ascheid, Andreas Ropers, Markus Wedler, Andreas Hoffmann
Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface. FDL (2015)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Coverage of compositional property sets under reactive constraints. ISQED (2014)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Compositional Completeness over reactive Constraints. MBMV (2013)
Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer
Proof Logging for Computer Algebra based SMT Solving. MBMV (2013)
Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Jörg Bormann, Markus Wedler, Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz
A New Formal Verification Approach for Hardware-dependent Embedded System Software. IPSJ Trans. Syst. LSI Des. Methodol. 6 (2013)
Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer
Proof logging for computer algebra based SMT solving. ICCAD (2013)
Bernard Schmidt, Carlos Villarraga, Jörg Bormann, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
A computational model for SAT-based verification of hardware-dependent low-level embedded system software. ASP-DAC (2013)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal plausibility checks for environment constraints. FDL (2012)
Joakim Urdahl, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
System verification of concurrent RTL modules by compositional path predicate abstraction. DAC (2012)
Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal Plausibility Checks for Environment Constraints. FDL (Selected Papers) (2012)
Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Formal hardware/software co-verification by interval property checking with abstraction. DAC (2011)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel
STABLE: A new QF-BV SMT Solver for hard Verification Problems combining Boolean Reasoning with Computer Algebra. MBMV (2011)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel
STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra. DATE (2011)
Minh D. Nguyen, Markus Wedler, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz
Formal Hardware/Software Co-Verification by Interval Property Checking with Abstraction. MBMV (2011)
Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz
-step induction to compute invariants for SAT-based property checking. DAC (2010)
Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz
Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL (2010)
Joakim Urdahl, Dominik Stoffel, Jörg Bormann, Markus Wedler, Wolfgang Kunz
Path predicate abstraction by complete interval property checking. FMCAD (2010)
Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Analyzing k-step induction to compute invariants for SAT-based property checking. MBMV (2010)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann
A re-use methodology for formal SoC protocol compliance verification. FDL (2009)
Markus Wedler, Evgeny Pavlenko, Alexander Dreyer, Frank Seelisch, Dominik Stoffel, Gert-Martin Greuel, Wolfgang Kunz
Solving hard instances in QF-BV combining Boolean reasoning with computer algebra. Algorithms and Applications for Next Generation SAT Solvers (2009)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
A Re-Use Methodology for SoC Protocol Compliance Verification. MBMV (2009)
Bernard Schmidt, Slava Bulach, Katharina Weinberger, Markus Wedler
Formale Verifikation einer Hardware-Implementierung des LIN-Protokoll Kontrollers. MBMV (2008)
Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz
Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP (2008)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. MBMV (2008)
Udo Krautz, Markus Wedler, Wolfgang Kunz, Kai Weber, Christian Jacobi, Matthias Pflanz
Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof. ASP-DAC (2008)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. FDL (2008)
Oliver Wienand, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Gert-Martin Greuel
An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths. CAV (2008)
Minh D. Nguyen, Max Thalmaier, Markus Wedler, Jörg Bormann, Dominik Stoffel, Wolfgang Kunz
Unbounded Protocol Compliance Verification Using Interval Property Checking With Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (11) (2008)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev
A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level. FDL (Selected Papers) (2008)
Markus Wedler, Dominik Stoffel, Raik Brinkmann, Wolfgang Kunz
A Normalization Method for Arithmetic Data-Path Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (11) (2007)
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Arithmetic Constraints in SAT-based Property Checking. MBMV (2007)
Alexander Jesser, Markus Wedler, Lars Hedrich, Wolfgang Kunz
A case study on applying bounded model checking to analog circuit verification. MBMV (2006)
Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wolfgang Kunz
Transition-by-transition FSM traversal for reachability analysis in bounded model checking. ICCAD (2005)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Normalization at the arithmetic bit level. DAC (2005)
Dominik Stoffel, Markus Wedler, Peter Warkentin, Wolfgang Kunz
Structural FSM traversal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (5) (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Arithmetic Reasoning in DPLL-Based SAT Solving. DATE (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Exploiting state encoding for invariant generation in induction-based property checking. ASP-DAC (2004)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Towards the impact of state encoding on induction-based property checking. MBMV (2003)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Using RTL Statespace Information and State Encoding for Induction Based Property Checking. DATE (2003)
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation. ISVLSI (2002)