Chirag Sudarshan

Publication Activity (10 Years)

Years Active: 2018-2023
Publications (10 Years): 26

Top Topics

Biologically Plausible

Autonomous Driving

Hardware Architecture

Dynamic Random Access Memory

Top Venues

J. Signal Process. Syst.

Publications

Paul-Philipp Manea, Chirag Sudarshan, Felix Cüppers, John Paul Strachan
Non-idealities and Design Solutions for Analog Memristor-Based Content-Addressable Memories. NANOARCH (2023)
Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steinert, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Bluethgen, Christian Sauer
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE (2023)
Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
A Framework for Formal Verification of DRAM Controllers. CoRR (2022)
Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
A Framework for Formal Verification of DRAM Controllers. MEMSYS (2022)
Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS (2022)
Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn
A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS (2022)
Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn
FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC (2022)
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 93 (12) (2021)
Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC (2021)
Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92 (11) (2020)
Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn
Efficient Generation of Application Specific Memory Controllers. MEMSYS (2020)
Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn
A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS (2020)
Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn
Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS (2020)
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 92 (11) (2020)
Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS (2019)
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR (2019)
Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
Fast validation of DRAM protocols with timed petri nets. MEMSYS (2019)
Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer
Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY (2019)
Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
An In-DRAM Neural Network Processing Engine. ISCAS (2019)
Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos
Efficient coding scheme for DDR4 memory subsystems. MEMSYS (2018)
Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE (2018)
Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE (2018)
Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS (2018)
Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
The Role of Memories in Transprecision Computing. ISCAS (2018)