Taha Soliman

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 19

Top Topics

Timed Petri Nets

Machine Learning

Error Detection And Correction

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn
Error Detection and Correction Codes for Safe In-Memory Computations. CoRR (2024)
Joseph Rogers, Taha Soliman, Magnus Jahre
AIO: An Abstraction for Performance Analysis Across Diverse Accelerator Architectures. ISCA (2024)
Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn
Error Detection and Correction Codes for Safe In-Memory Computations. ETS (2024)
Vivek Parmar, Franz Müller, Jing-Hua Hsuen, Sandeep Kaur Kingra, Nellie Laleni, Yannick Raffel, Maximilian Lederer, Alptekin Vardar, Konrad Seidel, Taha Soliman, Tobias Kirchner, Tarek Ali, Stefan Dünkel, Sven Beyer, Tian-Li Wu, Sourav De, Manan Suri, Thomas Kämpfe
Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator. Adv. Intell. Syst. 5 (6) (2023)
Yannick Braatz, Dennis Sebastian Rieber, Taha Soliman, Oliver Bringmann
Simulation-driven Latency Estimations for Multi-core Machine Learning Accelerators. AICAS (2023)
Nellie Laleni, Taha Soliman, Cecilia De la Parra, Franz Müller, Tobias Kirchner, Andre Guntoro, Thomas Kämpfe, Norbert Wehn, T. Jang
Torwards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators. ICECS (2023)
Yannick Braatz, Dennis Sebastian Rieber, Taha Soliman, Oliver Bringmann
SimPyler: A Compiler-Based Simulation Framework for Machine Learning Accelerators. ASAP (2023)
Taha Soliman, Amro Eldebiky, Cecilia De la Parra, Andre Guntoro, Norbert Wehn
Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators. SOCC (2022)
Cecilia De la Parra, Taha Soliman, Andre Guntoro, Akash Kumar, Norbert Wehn
Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. IEEE Micro 42 (6) (2022)
Taha Soliman, Nellie Laleni, Tobias Kirchner, Franz Müller, Ashish Shrivastava, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration. ACM Trans. Embed. Comput. Syst. 21 (6) (2022)
Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn
FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC (2022)
Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC (2021)
Taha Soliman, Cecilia De la Parra, Andre Guntoro, Norbert Wehn
Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators. AICAS (2021)
Cecilia De la Parra, Ahmed El-Yamany, Taha Soliman, Akash Kumar, Norbert Wehn, Andre Guntoro
Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design. ISCAS (2021)
Taha Soliman, Ricardo Olivo, Tobias Kirchner, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks. SoCC (2020)
Taha Soliman, Armin Runge, Leonardo Ecco
Enhancing the Utilization of Dot-Product Engines in Deep Learning Accelerators. IPDPS Workshops (2020)
Taha Soliman, Ricardo Olivo, Tobias Kirchner, Cecilia De la Parra, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
Efficient FeFET Crossbar Accelerator for Binary Neural Networks. ASAP (2020)
Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
Fast validation of DRAM protocols with timed petri nets. MEMSYS (2019)