Christian Weis

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 60

Top Topics

Hardware Architecture

Timed Petri Nets

Design Space Exploration

Top Venues

Publications

Jan Lappas, Mohamed Amine Riahi, Christian Weis, Norbert Wehn, Sani R. Nassif
Timing Analysis beyond Complementary CMOS Logic Styles. ASPDAC (2024)
Zhe Zhang, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif
Do Radiation and Aging Impact DVFS? TCAD-based Analysis on 22 nm FDSOI Latches. IOLTS (2024)
Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. VTS (2024)
Z. Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori
A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. IOLTS (2023)
Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steinert, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Bluethgen, Christian Sauer
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE (2023)
Hirra Anwar, Saad Ullah Khan, Muhammad Mohsin Ghaffar, Muhammad Fayyaz, Muhammad Jawad Khan, Christian Weis, Norbert Wehn, Faisal Shafait
The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop. Sensors 23 (15) (2023)
Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori
Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS (2022)
Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn
Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE (2022)
André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 (2022)
Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS (2022)
Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn
A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS (2022)
Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn
FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC (2022)
Muhammad Gohar Javed, Minahil Raza, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Muhammad Shahzad, Faisal Shafait
QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs. DICTA (2021)
Matthias Jung, Christian Weis, Norbert Wehn
The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems (2021)
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 93 (12) (2021)
Deepak M. Mathew, Hammam Kattan, Christian Weis, Jörg Henkel, Norbert Wehn, Hussam Amrouch
Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. IEEE Access 9 (2021)
Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC (2021)
Nosheen Abid, Muhammad Imran Malik, Muhammad Shahzad, Faisal Shafait, Haider Ali, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Marcus Liwicki
Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning. DICTA (2021)
Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
L. J. Gokul Vasan, Éder F. Zulian, Christian Weis, Matthias Jung, Norbert Wehn
Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. MEMSYS (2021)
Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn
System simulation with PULP virtual platform and SystemC. RAPIDO (2020)
Éder F. Zulian, Christian Weis, Norbert Wehn
Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. ISCAS (2020)
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92 (11) (2020)
Mhd Rashed Al Koutayni, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker
Real-Time Energy Efficient Hand Pose Estimation: A Case Study. Sensors 20 (10) (2020)
Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn
Efficient Generation of Application Specific Memory Controllers. MEMSYS (2020)
Deepak M. Mathew, Felipe S. Prado, Éder F. Zulian, Christian Weis, Muhammad Mohsin Ghaffar, Matthias Jung, Norbert Wehn
An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. MEMSYS (2020)
Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn
A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS (2020)
Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn
Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS (2020)
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
The gem5 Simulator: Version 20.0+. CoRR (2020)
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 92 (11) (2020)
Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS (2019)
Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS (2019)
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR (2019)
Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
Fast validation of DRAM protocols with timed petri nets. MEMSYS (2019)
Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer
Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY (2019)
Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
An In-DRAM Neural Network Processing Engine. ISCAS (2019)
Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig
A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test 35 (1) (2018)
Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR (2018)
Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos
Efficient coding scheme for DDR4 memory subsystems. MEMSYS (2018)
Menbere Kina Tekleyohannes, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
A Reconfigurable Accelerator for Morphological Operations. IPDPS Workshops (2018)
Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE (2018)
Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE (2018)
Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS (2018)
Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
The Role of Memories in Transprecision Computing. ISCAS (2018)
Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. 45 (6) (2017)
Menbere Tekleyohannes, MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
An advanced embedded architecture for connected component analysis in industrial applications. DATE (2017)
Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test 34 (4) (2017)
Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn
A Bank-Wise DRAM Power Model for System Simulations. RAPIDO (2017)
Christian Weis, Abdul Mutaal, Omar Naji, Matthias Jung, Andreas Hansson, Norbert Wehn
DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. 45 (6) (2017)
Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS (2017)
Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS (2017)
Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. 87 (3) (2017)
Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek
Error resilience and energy efficiency: An LDPC decoder design study. DATE (2016)
Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS (2016)
Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco V. Natale, Sven O. Krumke
ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS (2016)
Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC (2016)
Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn
A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS (2016)
Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC (2016)
Matthias Jung, Christian Weis, Norbert Wehn
A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. 61 (2016)
Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE (2015)
Michael Glaß, Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Faramarz Khosravi, Veit B. Kleeberger, Alexandra Listl, Daniel Müller-Gritschneder, Fabian Oboril, Ulf Schlichtmann, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis
Application-aware cross-layer reliability analysis and optimization. it Inf. Technol. 57 (3) (2015)
Matthias Jung, Éder Zulian, Deepak M. Mathew, Matthias Herrmann, Christian Brugger, Christian Weis, Norbert Wehn
Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS (2015)
Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson
A high-level DRAM timing, power and area exploration tool. SAMOS (2015)
Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson
Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI (2015)
Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian Weis, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn
A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI (2015)
Matthias Jung, Christian Weis, Norbert Wehn
DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. 8 (2015)
Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens
Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE (2014)
Daniele Bortolotti, Andrea Bartolini, Christian Weis, Davide Rossi, Luca Benini
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors. DATE (2014)
Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54 (6-7) (2014)
MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE (2014)
Matthias Jung, Christian Weis, Norbert Wehn, MohammadSadegh Sadri, Luca Benini
Optimized active and power-down mode refresh control in 3D-DRAMs. VLSI-SoC (2014)
Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE (2013)
MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Luca Benini
Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ. FPGAworld (2013)
Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar
TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO (2013)
Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC (2013)
Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn
A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro 33 (4) (2013)
Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
Exploration and Optimization of 3-D Integrated DRAM Subsystems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (4) (2013)
Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
An energy efficient DRAM subsystem for 3D integrated SoCs. DATE (2012)
Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles
Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design 2012 (2012)
Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
DRAM selection and configuration for real-time mobile systems. DATE (2012)
Christina Gimmler, Frank Kienle, Christian Weis, Norbert Wehn, Matthias Alles
ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems. ICNC (2012)
Ivan Shcherbakov, Christian Weis, Norbert Wehn
A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. IPDPS Workshops (2012)
Thomas Ilnseher, Frank Kienle, Christian Weis, Norbert Wehn
A 2.15GBit/s turbo code decoder for LTE advanced base station applications. ISTC (2012)
Christian Weis, Norbert Wehn, Igor Loi, Luca Benini
Design space exploration for 3D-stacked DRAMs. DATE (2011)
Ivan Shcherbakov, Christian Weis, Norbert Wehn
Bringing C++ productivity to VHDL world: From language definition to a case study. FDL (2011)