Bruce L. Jacob

Publication Activity (10 Years)

Years Active: 1995-2022
Publications (10 Years): 25

Top Topics

Execution Environment

International Symposium

Top Venues

IEEE Comput. Archit. Lett.

Publications

Yuqi Xue, Luyi Kang, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
Building A Trusted Execution Environment for In-Storage Computing. CoRR (2022)
Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
IceClave: A Trusted Execution Environment for In-Storage Computing. CoRR (2021)
Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache. ACM Trans. Archit. Code Optim. 18 (4) (2021)
Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang
IceClave: A Trusted Execution Environment for In-Storage Computing. MICRO (2021)
Luyi Kang, Bruce L. Jacob
Zoned FTL: Achieve Resource Isolation via Hardware Virtualization. MEMSYS (2021)
Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. IEEE Comput. Archit. Lett. 19 (2) (2020)
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
Tileable Monolithic ReRAM Memory Design. COOL CHIPS (2020)
Shang Li, Bruce L. Jacob
Statistical DRAM modeling. MEMSYS (2019)
Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé
PROFET: Modeling System Performance and Energy Without Simulating the CPU. Proc. ACM Meas. Anal. Comput. Syst. 3 (2) (2019)
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die. IEEE Micro 39 (6) (2019)
Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé
PROFET: Modeling System Performance and Energy Without Simulating the CPU. SIGMETRICS (Abstracts) (2019)
Shang Li, Rommel Sánchez Verdejo, Petar Radojkovic, Bruce L. Jacob
Rethinking cycle accurate DRAM simulation. MEMSYS (2019)
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob
Design for ReRAM-based main-memory architectures. MEMSYS (2019)
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung
Memory-systems challenges in realizing monolithic computers. MEMSYS (2018)
Rommel Sánchez Verdejo, Kazi Asifuzzaman, Milan Radulovic, Petar Radojkovic, Eduard Ayguadé, Bruce L. Jacob
Main memory latency simulation: the missing link. MEMSYS (2018)
Shang Li, Dhiraj Reddy, Bruce L. Jacob
A performance & power comparison of modern high-speed DRAM architectures. MEMSYS (2018)
Shang Li, Po-Chun Huang, Bruce L. Jacob
Exascale Interconnect Topology Characterization and Parameter Exploration. HPCC/SmartCity/DSS (2018)
Bruce L. Jacob
Proceedings of the International Symposium on Memory Systems, MEMSYS 2017, Alexandria, VA, USA, October 02 - 05, 2017 MEMSYS (2017)
Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS (2017)
Bruce L. Jacob
The 2 PetaFLOP, 3 Petabyte, 9 TB/s, 90 kW Cabinet: A System Architecture for Exascale and Big Data. IEEE Comput. Archit. Lett. 15 (2) (2016)
Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
DRAM Refresh Mechanisms, Penalties, and Trade-Offs. IEEE Trans. Computers 65 (1) (2016)
Bruce L. Jacob
The Case for VLIW-CMP as a Building Block for Exascale. IEEE Comput. Archit. Lett. 15 (1) (2016)
Shang Li, Po-Chun Huang, David Banks, Max DePalma, Ahmed Elshaarany, K. Scott Hemmert, Arun Rodrigues, Emily Ruppel, Yitian Wang, Jim Ang, Bruce L. Jacob
Low Latency, High Bisection-Bandwidth Networks for Exascale Memory Systems. MEMSYS (2016)
Paul Tschirhart, Jim Stevens, Zeshan Chishti, Bruce L. Jacob
The Case for Associative DRAM Caches. MEMSYS (2016)
Jim Stevens, Paul Tschirhart, Bruce L. Jacob
Fast full system memory checkpointing with SSD-aware memory controller. MEMSYS (2016)
Ishwar Bhati, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions. ISCA (2015)
Jim Stevens, Paul Tschirhart, Bruce L. Jacob
The Semantic Gap Between Software and the Memory System. MEMSYS (2015)
Paul Tschirhart, Jim Stevens, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob
Bringing Modern Hierarchical Memory Systems Into Focus: A study of architecture and workload factors on system performance. MEMSYS (2015)
Bruce L. Jacob
High-bandwidth, high-capacity, low-power memory systems. ICSAMOS (2014)
Ishwar Bhati, Zeshan Chishti, Bruce L. Jacob
Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling. ISLPED (2013)
Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, Bruce L. Jacob
Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM. HPCA (2013)
Mu-Tien Chang, Joe Gross, Bruce L. Jacob
Energy-Efficient Cached DIMM Architecture. MASCOTS (2012)
Elliott Cooper-Balis, Paul Rosenfeld, Bruce L. Jacob
Buffer-on-board memory systems. ISCA (2012)
Mu-Tien Chang, Bruce L. Jacob
An analytical model to estimate PCM failure probability due to process variations. SoCC (2011)
Arun F. Rodrigues, K. Scott Hemmert, Brian W. Barrett, Chad D. Kersey, Ron A. Oldfield, M. Weston, R. Risen, J. Cook, Paul Rosenfeld, E. CooperBalls, Bruce L. Jacob
The structural simulation toolkit. SIGMETRICS Perform. Evaluation Rev. 38 (4) (2011)
Paul Rosenfeld, Elliott Cooper-Balis, Bruce L. Jacob
DRAMSim2: A Cycle Accurate Memory System Simulator. IEEE Comput. Archit. Lett. 10 (1) (2011)
Keren Bergman, Gilbert Hendry, Paul Hargrove, John Shalf, Bruce L. Jacob, K. Scott Hemmert, Arun Rodrigues, David R. Resnick
Let there be light!: the future of memory systems is photonics and 3D stacking. MSPC (2011)
Elliott Cooper-Balis, Bruce L. Jacob
Fine-Grained Activation for Power Reduction in DRAM. IEEE Micro 30 (3) (2010)
Cagdas Dirik, Bruce L. Jacob
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization. ISCA (2009)
Ankush Varma, Eric Debes, Igor Kozintsev, Paul Klein, Bruce L. Jacob
Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. 7 (3) (2008)
Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA (2007)
Ankush Varma, Bruce L. Jacob, Eric Debes, Igor Kozintsev, Paul Klein
Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. 6 (4) (2007)
Samuel Rodríguez, Bruce L. Jacob
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm). ISLPED (2006)
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA (2006)
Aamer Jaleel, Bruce L. Jacob
In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). IEEE Trans. Computers 55 (5) (2006)
Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. CASES (2006)
Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung
BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS (2005)
David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob
DRAMsim: a memory system simulator. SIGARCH Comput. Archit. News 33 (4) (2005)
Justin Teller, Charles B. Silio Jr., Bruce L. Jacob
Performance characteristics of MAUI: an intelligent memory system architecture. Memory System Performance (2005)
Aamer Jaleel, Bruce L. Jacob
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. HPCA (2005)
Hongxia Wang, Samuel Rodríguez, Cagdas Dirik, Amol Gole, Vincent Chan, Bruce L. Jacob
TERPS: the embedded reliable processing system. ASP-DAC (2005)
Bharath Iyer, Sadagopan Srinivasan, Bruce L. Jacob
Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs. ISCA (2004)
Paul Kohout, Brinda Ganesh, Bruce L. Jacob
Hardware support for real-time operating systems. CODES+ISSS (2003)
Bruce L. Jacob, Shuvra S. Bhattacharyya
Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. 2 (1) (2003)
Ankush Varma, Brinda Ganesh, Mainak Sen, Suchismita Roy Choudhury, Lakshmi Srinivasan, Bruce L. Jacob
A control-theoretic approach to dynamic voltage scheduling. CASES (2003)
Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
The Performance and Energy Consumption of Embedded Real-Time Operating Systems. IEEE Trans. Computers 52 (11) (2003)
Bruce L. Jacob
A Case for Studying DRAM Issues at the System Level. IEEE Micro 23 (4) (2003)
Bruce L. Jacob, Shuvra S. Bhattacharyya
Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. 1 (1) (2002)
Aamer Jaleel, Bruce L. Jacob
In-Line Interrupt Handling for Software-Managed TLBs. ICCD (2001)
Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
The performance and energy consumption of three embedded real-time operating systems. CASES (2001)
Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob
Transparent data-memory organizations for digital signal processors. CASES (2001)
Bruce L. Jacob, Trevor N. Mudge
Uniprocessor Virtual Memory without TLBs. IEEE Trans. Computers 50 (5) (2001)
Vinodh Cuppu, Bruce L. Jacob
Concurrency, latency, or system overhead: which has the largest impact on uniprocessor DRAM-system performance?. ISCA (2001)
Aamer Jaleel, Bruce L. Jacob
Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. HiPC (2001)
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge
High-Performance DRAMs in Workstation Environments. IEEE Trans. Computers 50 (11) (2001)
Brian Davis, Bruce L. Jacob, Trevor N. Mudge
The New DRAM Interfaces: SDRAM, RDRAM and Variants. ISHPC (2000)
David R. Kaeli, Bruce L. Jacob
Fifth Annual Workshop on Computer Education. HPCA (1999)
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge
A Performance Comparison of Contemporary DRAM Architectures. ISCA (1999)
Bruce L. Jacob, Trevor N. Mudge
Virtual memory in contemporary microprocessors. IEEE Micro 18 (4) (1998)
Bruce L. Jacob, Trevor N. Mudge
A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations. ASPLOS (1998)
Bruce L. Jacob, Trevor N. Mudge
Virtual Memory: Issues of Implementation. Computer 31 (6) (1998)
Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge
A Comment on "An Analytical Model for Designing Memory Hierarchies". IEEE Trans. Computers 46 (10) (1997)
Bruce L. Jacob, Trevor N. Mudge
Software-Managed Address Translation. HPCA (1997)
Bruce L. Jacob, Trevor N. Mudge
in action. ACM SIGOPS European Workshop (1996)
Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge
An Analytical Model for Designing Memory Hierarchies. IEEE Trans. Computers 45 (10) (1996)
Bruce L. Jacob
Composing with Genetic Algorithms. ICMC (1995)