Manoj Franklin

Publication Activity (10 Years)

Years Active: 1989-2020
Publications (10 Years): 1

Top Topics

Inference Process

Absolute Position

Outdoor Environments

Top Venues

Publications

Xinyu Zhou, Manoj Franklin
Indoor Route and Location Inference using Smartphone IMU Sensors. PIMRC (2020)
Michael David Black, Manoj Franklin
Teaching computer architecture with a graphical PC simulator. ITiCSE (2011)
Rania H. Mameesh, Manoj Franklin
Speculative-aware execution: a simple and efficient technique for utilizing multi-cores to improve single-thread performance. PACT (2010)
Joonhyuk Yoo, Manoj Franklin
Hierarchical Verification for Increasing Performance in Reliable Processors. J. Electron. Test. 24 (1-3) (2008)
Jizhu Lu, Michael Perrone, Kursad Albayraktaroglu, Manoj Franklin
HMMer-Cell: High Performance Protein Profile Searching on the Cell/B.E. Processor. ISPASS (2008)
Joonhyuk Yoo, Manoj Franklin
Prioritizing verification via value-based correctness criticality. ICCD (2007)
Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj Franklin
Non-Inclusion Property in Multi-Level Caches Revisited. Int. J. Comput. Their Appl. 14 (2) (2007)
Sean Leventhal, Manoj Franklin
Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors. ICCD (2006)
Joonhyuk Yoo, Manoj Franklin
The Filter Checker: An Active Verification Management Approach. DFT (2006)
Mohamed M. Zahran, Manoj Franklin
RHT: A Context-Based Return Address Predictor. CDES (2006)
Aneesh Aggarwal, Manoj Franklin
Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors. IEEE Trans. Parallel Distributed Syst. 16 (10) (2005)
Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung
BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS (2005)
Michael D. Black, Manoj Franklin
Neural Confidence Estimation for More Accurate Value Prediction. HiPC (2005)
Aneesh Aggarwal, Manoj Franklin
Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. IEEE Trans. Computers 54 (12) (2005)
Rania H. Mameesh, Manoj Franklin
SST: Symbolic Subordinate Threading. ICCD (2005)
Aneesh Aggarwal, Manoj Franklin, Oguz Ergin
Defining Wakeup Width for Efficient Dynamic Scheduling. ICCD (2004)
Anasua Bhowmik, Manoj Franklin
A General Compiler Framework for Speculative Multithreaded Processors. IEEE Trans. Parallel Distributed Syst. 15 (8) (2004)
Mohamed M. Zahran, Manoj Franklin
Dynamic Thread Resizing for Speculative Multithreaded Processors. ICCD (2003)
Anasua Bhowmik, Manoj Franklin
A fast approximate interprocedural analysis for speculative multithreading compilers. ICS (2003)
Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark
Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. ISCA (2003)
Aneesh Aggarwal, Manoj Franklin
Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. IEEE PACT (2003)
Aneesh Aggarwal, Manoj Franklin
Energy Efficient Asymmetrically Ported Register Files. ICCD (2003)
Anasua Bhowmik, Manoj Franklin
Exploiting Data Value Prediction in Compiler Based Thread Formation. HiPC (2002)
Anasua Bhowmik, Manoj Franklin
A general compiler framework for speculative multithreading. SPAA (2002)
Renju Thomas, Manoj Franklin
Using Dataflow Based Contextfor Accurate Branch Prediction. HiPC (2002)
Mohamed M. Zahran, Manoj Franklin
A Feasibility Study of Hierarchical Multithreading. IPDPS (2002)
Aneesh Aggarwal, Manoj Franklin
Hierarchical Interconnects for On-Chip Clustering. IPDPS (2002)
Krishnan Kailas, Manoj Franklin, Kemal Ebcioglu
A Register File Architecture and Compilation Scheme for Clustered ILP Processors. Euro-Par (2002)
Mohamed M. Zahran, Manoj Franklin
Return-Address Prediction in Speculative Multithreaded Environments. HiPC (2002)
Kun Luo, Jayanth Gummaraju, Manoj Franklin
Balancing thoughput and fairness in SMT processors. ISPASS (2001)
Aneesh Aggarwal, Manoj Franklin
An empirical study of the scalability aspects of instruction distribution algorithms for clustered processors. ISPASS (2001)
Kun Luo, Manoj Franklin, Shubhendu S. Mukherjee, André Seznec
Boosting SMT Performance by Speculation Control. IPDPS (2001)
Renju Thomas, Manoj Franklin
Using Dataflow Based Context for Accurate Value Prediction. IEEE PACT (2001)
Aneesh Aggarwal, Manoj Franklin
Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. HiPC (2001)
Jayanth Gummaraju, Manoj Franklin
Branch Prediction in Multi-Threaded Processors. IEEE PACT (2000)
Wamsi Mohan, Manoj Franklin
Improving Data Value Prediction Accuracy Using Path Correlation. HiPC (1999)
Simonjit Dutta, Manoj Franklin
Control Flow Prediction Schemes for Wide-Issue Superscalar Processors. IEEE Trans. Parallel Distributed Syst. 10 (4) (1999)
Sreenivas Vadlapatla, Manoj Franklin
Performance Benefits of Exploiting Control Independence. HiPC (1999)
Brian Toone, Manoj Franklin
Control flow prediction with unbalanced tree-like subgraphs. HiPC (1998)
Rahul Sathe, Manoj Franklin
Available parallelism with data value prediction. HiPC (1998)
Rahul Sathe, Kai Wang, Manoj Franklin
Techniques for performing highly accurate data value prediction. Microprocess. Microsystems 22 (6) (1998)
Narayan Ranganathan, Manoj Franklin
An Empirical Study of Decentralized ILP Execution Models. ASPLOS (1998)
Narayan Ranganathan, Manoj Franklin
The PEWs microarchitecture: reducing complexity through data-dependence based decentralization. Microprocess. Microsystems 22 (6) (1998)
Krishna K. Sundararaman, Manoj Franklin
Multiscalar Execution along a Single Flow of Control. ICPP (1997)
Kai Wang, Manoj Franklin
Highly accurate data value prediction. HiPC (1997)
Kai Wang, Manoj Franklin
Highly Accurate Data Value Prediction Using Hybrid Predictors. MICRO (1997)
Gregory A. Kemp, Manoj Franklin
PEWs: A Decentralized Dynamic Scheduler for ILP Processing. ICPP, Vol. 1 (1996)
Manoj Franklin, Gurindar S. Sohi
ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. IEEE Trans. Computers 45 (5) (1996)
Manoj Franklin, Kewal K. Saluja
Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (9) (1996)
Vamsee K. Madavarapu, Manoj Franklin, Krishna K. Sundararaman
A study of dynamic scheduling techniques for multiscalar processors. HiPC (1996)
Manoj Franklin
Incorporating fault tolerance in superscalar processors. HiPC (1996)
Manoj Franklin
Fast computation of C-MISR signatures. Asian Test Symposium (1995)
Mark Smotherman, Manoj Franklin
Improving CISC instruction decoding performance using a fill unit. MICRO (1995)
Manoj Franklin
A study of time redundant fault tolerance techniques for superscalar processors. DFT (1995)
Manoj Franklin
Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor. ICPP (1) (1995)
Simonjit Dutta, Manoj Franklin
Control flow prediction with tree-like subgraphs for superscalar processors. MICRO (1995)
Manoj Franklin, Kewal K. Saluja, Kyuchull Kim
Fast computation of MISR signatures. VLSI Design (1995)
Manoj Franklin, Kewal K. Saluja
An Algorithm to Test Reconfigured RAMs. VLSI Design (1994)
Manoj Franklin, Kewal K. Saluja
Hypergraph Coloring and Reconfigured RAM Testing. IEEE Trans. Computers 43 (6) (1994)
Manoj Franklin, Mark Smotherman
A fill-unit approach to multiple instruction issue. MICRO (1994)
Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi
Control flow prediction for dynamic ILP processors. MICRO (1993)
Manoj Franklin, Gurindar S. Sohi
The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. ISCA (1992)
Manoj Franklin, Gurindar S. Sohi
Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. MICRO (1992)
Gurindar S. Sohi, Manoj Franklin
High-Bandwidth Data Memory Systems for Superscalar Processors. ASPLOS (1991)
Manoj Franklin, Kewal K. Saluja
An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults. ITC (1991)
Manoj Franklin, Kewal K. Saluja
Pattern Sensitive Fault Testing of RAMs with Bullt-in ECC. FTCS (1991)
Manoj Franklin, Kewal K. Saluja
Built-in Self-testing of Random-Access Memories. Computer 23 (10) (1990)
Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita
Row/column pattern sensitive fault detection in RAMs via built-in self-test. FTCS (1989)
Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita
Design of a BIST RAM with Row/Column Pattern Sensitive Fault Detection Capability. ITC (1989)
Gurindar S. Sohi, Manoj Franklin, Kewal K. Saluja
A study of time-redundant fault tolerance techniques for high-performance pipelined computers. FTCS (1989)